tag:blogger.com,1999:blog-19092890.post7728120250475839836..comments2024-03-28T08:25:07.299+02:00Comments on Image Sensors World: Keynote on Fast Image SensorsVladimir Koifmanhttp://www.blogger.com/profile/01800020176563544699noreply@blogger.comBlogger2125tag:blogger.com,1999:blog-19092890.post-64741837547322963502016-09-29T10:11:40.489+03:002016-09-29T10:11:40.489+03:00First, PCIe 4.0 is fairly conservative with respec...First, PCIe 4.0 is fairly conservative with respect to the speed per lane. There are faster interfaces, such as 28Gbps and 32Gbps per lane on the market, and 56Gbps and 112Gbps per lane are in development.<br /><br />Regarding the 300Gbps Cu "physical limitation", I'm not sure what you refer to. It definitely depends on the type of the lane - whether it is on PCB or interposer, the type of PCB and interposer, trace length, and many, many other parameters. In most of these cases, the speed can go much faster than 300Gbps per lane. The practical power would limit us well before than the theoretical speed.Vladimir Koifmanhttps://www.blogger.com/profile/01800020176563544699noreply@blogger.comtag:blogger.com,1999:blog-19092890.post-86574194019621606572016-09-29T06:15:55.223+03:002016-09-29T06:15:55.223+03:00I think that the 300Gbs refers to the physical lim...I think that the 300Gbs refers to the physical limitations of a single lane of Cu interconnect. The PCIe standard you are referring to achieves that via redundancy, and is in reality 20x below the physical limit of Cu GroovyGeekhttps://www.blogger.com/profile/02461907290773954635noreply@blogger.com