- Hot pixel removal and noise reduction (spatial and temporal IP cores are available)
- Advanced per pixel tone mapping (Apical's patented Iridix IP core)
- Advanced demosaic and color correction
Tuesday, April 05, 2011
Altera, Apical, AltaSens Jointly Develop WDR Chipset
PR Newswire: The WDR chipset combines an Altera Cyclone IV E FPGA with a security chip that supports Apical's HD WDR full ISP pipeline IP and AltaSens' 1080p60 A3372E3-4T image sensor. Apical's HD HDR full image signal pipeline IP is optimized to take advantage of the capabilities of the Altera FPGA. No other application ASSP or DSP platform is said to offer WDR technology using a 1080p60 sensor and a comprehensive datapath (a full HD raster is 2200x1125 pixels x 16+ bits per pixel x 60 frames per second, resulting in >2 Gbps bandwidth). The solution offers:
why AltaSense sensor is not used?
ReplyDeleteIt is used, p/n A3372E3-4T
ReplyDeleteI wonder if this means that Altasens will sell into small markets again. This is a potentially very helpful development for allowing small customers to use the Altasens WDR technology.
ReplyDelete