Albert Theuwissen published first part of the overview of Image Sensor four session presentations. Four papers reviewed have quite interesting interesting content.
Samsung pseudo-multiple sampling imager paper has performance data of its 1.4um pixel:
Process: 90nm
2.5T shared architecture
Conversion Gain: 110 uV/e
Full Well: 4100 e
Sensitivity: 3700e-/lux.s
Dark Current: 6.4e-/s at 55C
With that, the 2009 IISW papers are now publicly available.
ReplyDeleteThere is an error in Albert's report. He says:
ReplyDelete"Y. Chae et al. (Yonsei University and Samsung Electronics) : “2.1 Mpixel with column-parallel ADC architecture”. The speaker made an overview of the column level ADCs used in CMOS imagers : ... Apparently there is a need for another architecture ! A 2nd order Delta-Sigma ADC is implemented for the very first time as column-level ADC in a CMOS imager. "
Actually in 1997 Junichi Nakamura published the first column-parallel 2nd order sigma-delta ADC for image sensors. IEEE Trans ED Oct 1997. It was a joint Olympus-JPL effort.
I added the wordings of the author and did not check whether this was correct or not. If not, then the credit of being the first goes to Junichi Nakamura.
ReplyDeleteEvery CMOS image sensor paper should reference at least one paper from ERF. He even lays them all out for you on his webpage to make it easier.
ReplyDeleteSticking with the facts, do you think the paper that Eric mentions is not the prior art? Or do you think that the prior art should not be mentioned? Anything else?
ReplyDeleteClaiming to have done something for "the very first time" means they did not search for prior art. Searching w/Google Scholar, for example, with "image sensor with 2nd order sigma delta" yields the Nakamura paper in the top 20.
ReplyDeleteWhile it is true that 99% of CMOS image sensor work can trace its roots back to JPL (and from there to a lot of prior art elsewhere in CCDs), I don't feel it is necessary to reference ALL prior art in EVERY paper. We all stand on the shoulders of earlier technologists. The JPL/Photobit work is one sort of "sediment layer" in the geological strata that we walk on, just above the dinosaur layer :) There has been a lot of excellent work since then. I am really amazed at where the technology has gone in dimensions, performance and application in the last 10 years.
Lastly, I think all published papers should be readily available free to all technologists. The charging of large fees for access to on-line libraries makes me angry with the IEEE and SPIE. Besides trying to change these policies, the next best thing I can do is to put as many of the IISW papers on line as I can for free, as well as my own work. It would be great if all technologists did this as well. It is just ethically wrong that the professional societies make other people pay to read our papers, not to mention not sharing the fees with the authors. It makes it dificult to do any sort of interdisciplinary research if you are not part of a large organization that pays for all your access.
Does anyone know which 1% of the MOS imager work today does not have its roots in JPL/Photobit?
ReplyDeleteI think that saying 99% came from JPL is a little bit exagerated any way. For example, the column ADC can be traced back to IVP design and also several italian teams.
ReplyDeleteWho did the first MOS image sensor? Was JPL the first to use a CMOS process? Which process was used?
ReplyDeleteSpeaking of need for another architecture and not being part of a large organization...
ReplyDeleteHas anyone tried column ADC for image sensors using sinusoidal reference waveforms?
Instead of sawtooth waveforms, that is. In theory it seems like a good way to beat the tradeoff between linearity and speed that's part of single-slope conversion.
:)
Now it's six-year-old & 36-year-old teach-yourself-to-skate time, during which sinusoidal waveforms may also outperform the sawtooth.
Anonymous - first MOS image sensor predates CCD. You should learn the difference between passive pixels, active pixels, and APS with intrapixel charge transfer. Why don't you study some papers to see how all this fits together?
ReplyDeleteto CDM: Single-slope ADCs often use non-linear or piecewise linear ramp. I have not heard about sinewave though.
ReplyDeleteLet's say you can produce a 60 kHz sawtooth waveform with ramps that are linear to 11 bits. This will let you run a column single-slope ADC that serves 2000 pixels at 30 frames per second. To increase the pixel count you have to drop the frame rate, and vice versa, unless you can produce a sufficiently accurate sawtooth waveform at a higher frequency. (Aye, there's the rub...)
ReplyDeleteI tend to think when I see specifications for chips with single-slope column ADC that are a few fps at full resolution but nice video fps at reduced resolution that system designs are running into a waveform generation limitation.
However, for the hypothetical system, a 30 kHz sine wave would be sufficient to serve the 2000 pixels 30 times per second. With a 60 kHz sine wave you'd be able to cancel comparator offset with upswing and downswing measurements with the comparator inputs swapped. Or serve 4000 pixels at 30 fps, or 2000 at 60 fps. Etc.
So there are a number of interesting research questions, among which are the following...
Is it possible to generate sine waves of higher precision (than 10 or 11 bits) at the frequencies of column ADCs in image sensors?
Is it possible to generate sufficiently accurate sine waves at higher frequencies, and if so, how high?
What about both?
It's easy to generate a high frequency sinewave, as easy as high frequency ramp. The main challenge of ramp ADC is a small, fast, low power and high quality comparator. The ramp shape is sometimes distorted to ease on comparator design. Sinewave is not optimal in that sense.
ReplyDelete