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Wednesday, December 24, 2014

Alexima Applies for GS Pixel with Tri-State Transfer Gate Patent

Alexima's patent application US20140367552 "Image sensors, methods, and pixels with tri-level biased transfer gates" by Jaroslav Hynecek and Alexander Krymski proposes a global shutter "pixel with a transfer gate that is controllable among at least three biasing conditions, including a first biasing condition in which electrons are transferable from a photodiode to a potential well under the transfer gate, a second biasing condition in which the electrons are confined in the potential well under the transfer gate, and a third biasing condition in which the electrons are transferable out of the potential well under the transfer gate." The pixel cross-section and its band diagram in all 3 modes is shown below:

9 comments:

  1. Nice idea, the combination of a 2-phase CCD gate (under the transfer gate, also present in the IMX174 of Sony) and a virtual gate CCD (region 207). Not surprising because the inventor of the original virtual phase CCD is also mentioned as the inventor of this patent application, being Jerry Hynecek.

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  2. What is the utility of 205 please??

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    1. It's just a way to create different dosage, so that PD area gets 511 and 205 dosage together, while parts of AB and Tx gates get only 511.

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  3. I also like this idea but there may be a drawback or two.

    It is similar in structure to a previous Aptina paper co-authored by Jerry and presented at the 2013 IISW. http://www.imagesensors.org/Past%20Workshops/2013%20Workshop/2013%20Papers/Slides/12-1_Velichko_SLIDES.pdf
    (see slide #19).

    This 2013 IISW paper also inspired the "pump-gate jot" that we proposed in our 2014 IEDM paper as a concept and which is in fab.

    Actually, I hope the Velichko et al paper wins the WKA. It was very good, in my opinion at least!

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    1. Indeed, the TX shown here is effectively a "pump gate" operation except that the well depth difference is created by the P doping and in Aptina case, it is created by the N doping on the opposite side.

      -yang ni

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  4. Sony, Aptina, Alexima.. others? How far is it from real product in Aptina and Alexima case?

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  5. I remember well that in SONY interline CCD, one of the vertical phases use 3-level signal. One (low) for barrier during integration, one (high) for charge readout and other (mid) for vertical charge shift.

    -yang ni

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  6. Oh, duh. This structure would be very good for ToF sensors with CDS output, especially with multiple output ports tied to the same PPD (like our old Photobit patent Alex!).

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  7. Middle level does not pin the surface and dark current will be huge while containing charges.

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