SPAD Sensor for Entangled Photon Imaging

SPIE publishes FBK paper and presentation video of "SUPERTWIN: towards 100kpixel CMOS quantum image sensors for quantum optics applications" by Leonardo Gasparini; Bänz Bessire; Manuel Unternährer; André Stefanov; Dmitri Boiko; Matteo Perenzoni; David Stoppa.

"Quantum imaging uses entangled photons to overcome the limits of a classical-light apparatus in terms of image quality, beating the standard shot-noise limit, and exceeding the Abbe diffraction limit for resolution. In today experiments, the spatial properties of entangled photons are recorded by means of complex and slow setups that include either the motorized scanning of single-pixel single-photon detectors, such as Photo-Multiplier Tubes (PMT) or Silicon Photo- Multipliers (SiPM), or the use of low frame rate intensified CCD cameras. CMOS arrays of Single Photon Avalanche Diodes (SPAD) represent a relatively recent technology that may lead to simpler setups and faster acquisition. They are spatially- and time-resolved single-photon detectors, i.e. they can provide the position within the array and the time of arrival of every detected photon with less than 100 ps resolution. SUPERTWIN is a European H2020 project aiming at developing the technological building blocks (emitter, detector and system) for a new, all solid-state quantum microscope system exploiting entangled photons to overcome the Rayleigh limit, targeting a resolution of 40nm. This work provides the measurement results of the 2nd order cross-correlation function relative to a flux of entangled photon pairs acquired with a fully digital 8×16 pixel SPAD array in CMOS technology. The limitations for application in quantum optics of the employed architecture and of other solutions in the literature will be analyzed, with emphasis on crosstalk. Then, the specifications for a dedicated detector will be given, paving the way for future implementations of 100kpixel Quantum Image Sensors."

The trend in CMOS SPAD-array design goes towards:

(i) the miniaturization of the pixel (below 10µm) to increase the output image resolution;

(ii) SPAD optimization to improve the photon detection efficiency (PDE) while reducing DCR, after-pulsing and crosstalk;

(iii) 3D stacking of chips, with a top tier optimized for sensing that includes the array of SPADs and a bottom tier optimized for processing (i.e., counting, timestamping and buffering);

(iv) smart mechanisms for timestamping photons, such TDC sharing and time-gated counting in the analog domain;

(v) the on-chip implementation of pre-processing stages, such as timestamp histogramming, to reduce the sensor output data size and increase the frame rate, thus enabling synchronization with fast sources of photons (from 100kHz up to tens of MHz).