MIPI Releases I3C Basic v1.0 Spec

MIPI Alliance releases MIPI I3C Basic v1.0, a subset of the MIPI I3C specification that bundles the most commonly needed I3C features for developers and other standards organizations. MIPI I3C Basic v1.0 provides 20 key features from MIPI I3C, including:

• Backward compatibility with I2C
• A multi-drop bus that, at 12.5 MHz, is over 12 times faster than I2C supports while using significantly less power
• In-band interrupts to allow slaves to notify masters of interrupts, a design that eliminates the need for a separate general-purpose input/output (GPIO) for each slave and thus reduces system cost and complexity
• Dynamic address assignment to avoid conflicting static addresses, providing flexibility and pin savings
• Standardized discovery, and bus configuration and control
• Uses standard low-cost pads and requires minimal cost in logic to support

“We have seen tremendous interest in I3C from the mobile ecosystem. Now, with I3C Basic, the broader developer community can immediately and efficiently begin using these capabilities as an alternative to I2C,” said Joel Huloux, chairman of MIPI Alliance. ”In addition, we are already working with several standards organizations to integrate I3C Basic into their specifications. We believe it provides tremendous value to mobile and many other industries in multiple ways.”