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Sunday, April 05, 2020

Single-Photon CMOS Pixel Using Multiple Non-Destructive Signal Sampling

MDPI paper "Simulations and Design of a Single-Photon CMOS Imaging Pixel Using Multiple Non-Destructive Signal Sampling" by by Konstantin D. Stefanov, Martin J. Prest, Mark Downing, Elizabeth George, Naidu Bezawada, and Andrew D. Holland from The Open University, UK, and European Southern Observatory, Germany, describes a 10um pixel with 0.15e- noise in 180nm process.

"A single-photon CMOS image sensor (CIS) design based on pinned photodiode (PPD) with multiple charge transfers and sampling is described. In the proposed pixel architecture, the photogenerated signal is sampled non-destructively multiple times and the results are averaged. Each signal measurement is statistically independent and by averaging, the electronic readout noise is reduced to a level where single photons can be distinguished reliably. A pixel design using this method was simulated in TCAD and several layouts were generated for a 180-nm CMOS image sensor process. Using simulations, the noise performance of the pixel was determined as a function of the number of samples, sense node capacitance, sampling rate and transistor characteristics. The strengths and limitations of the proposed design are discussed in detail, including the trade-off between noise performance and readout rate and the impact of charge transfer inefficiency (CTI). The projected performance of our first prototype device indicates that single-photon imaging is within reach and could enable ground-breaking performances in many scientific and industrial imaging applications."

5 comments:

  1. So long ago that it is forgotten, my student Suni Mendis and I worked on a CMOS APS floating gate sensor for multiple non-destructive readout, not too unlike this proposal. Her work was published contemporaneously with the "dinosaur" paper in 1993, 27 years ago (Same conf. proceedings). The FG output went to a sigma-delta ADC. It was also mentioned in the dinosaur paper and in turn was inspired by noise reduction by non-destructive multiple sampling in Fairchild CCDs (Wen) and Janesick's Skipper chip at JPL (we were at JPL of course, too). https://doi.org/10.1117/12.148606

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  2. ITE Technical Report Vol.33, No.18, PP.5-8. IST2009-9, CE2009-29 (Mar.2009) "Development of a Charge Multiplication CMOS Image sensor"
    looks like same.

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    1. Might looks similar in structure but I think the concept is different. In the Japanese work, it is impact ionization due to high electric field and potential change that results in charge domain signal multiplication, like Hynecek's "Impactron" which in turn provides enough gain to get over the noise floor. Not so good for photon number resolution. In the 'skipper' structure, it is repeated readout where the read noise can be averaged out over n-reads, giving a sqrt(n) improvement in SNR, give or take other noise sources. This will work for photon number resolution, albeit with perhaps more readout cycles.

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  3. That was seen also in ISSCC2009.

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    1. yes, it looks very similar as the work from Sanyo in ISSCC 2009.

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