"Silicon photodiode based CMOS sensors with backside-illumination for 300 to 1000 nm wavelength range were studied. We showed that a single hole in the photodiode increases the optical efficiency of the pixel. In near-infrared wavelengths, the enhancement allows 70% absorption in a 3 microns thick Si. It is 4x better than for the flat pixel. We compared different shapes and sizes of single holes and holes arrays. We have shown that a certain size and shape in single holes pronounce better optical efficiency enhancement. The crosstalk was successfully reduced with trenches between pixels. We optimized the trenches to achieve minimal pixel separation for 1.12 microns pixel."
It is mentioned in the text that the optical response of the pixel is becoming better if the DTI gets deeper and wider. Especially the latter is an interesting observation. Unfortunately a wider DTI eats away the charge handling capability.
ReplyDeleteWill be interesting to see if charge can be stored in the DTI; like a LOFIC or so
DeleteI believe to recall to have seen papers using deep-trench capacitor memory for CIS. I believe that was a voltage-domain, burst-mode, high-speed imager. So yeah, possible. But how to do that for sub <0.8 um pixel pitch? I think this is more relevant for niche applications using larger pixels
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