Sunday, May 28, 2017

AR Startup Magic Leap Seeks Round D Funding at $6-8 Billion Valuation

Backchannel, RoadToVR: The secretive AR startup Magic Leap is in the process of raising D round money at the company valuation of $6–8 billion, reportedly. Chinese Alibaba is said to be leading the new funding round.

Just 15 months ago, Magic Leap raised $793.5M, adding to the $592M it had previously raised and earning a valuation at $4.5 billion.

Saturday, May 27, 2017

Quad Camera Phones Advance from Low-End to Mid-Range

While smartphones with dual rear and dual front cameras first appeared on the low end of the market, this trend expands to mid-range models now. Mediatek reports that Alcatel Flash smartphone features 4 cameras. The rears are dual 13 MP (RGB+mono), f/2.0 with PDAF, while on the front one is an 8MP + 5MP with also f/2.0 lens and PDAF:

Gionee S10 too features double-dual-camera. GizmoChina and Forbes report that the rear camera has 16MP+8MP sensors and f/1.8 6P lens, while the front camera has 20MP+8MP sensors:

Friday, May 26, 2017

TSMC Proposes SiGe and III-V on Si Image Sensor Processes

TSMC patent application US20170141153 "Complementary metal-oxide-semiconductor (CMOS) image sensor with silicon and silicon germanium" by Yueh-chuan Lee, Chia-chan Chen, Jhy-jyi Sze proposes a process flow and a device extending the CMOS sensor sensitivity into IR band:

"...solution is to use silicon germanium in place of elemental silicon for the semiconductor layer. Silicon germanium has a lower bandgap than elemental silicon, such that it is better for the absorption of infrared radiation. However, silicon germanium has poor compatibility with CMOS processes for the logic devices due to increased leakage current. As such, manufacturing the logic devices on silicon germanium introduces difficulties and adds cost to the manufacture of the CMOS image sensors.

The present application is directed to a CMOS image sensor with elemental silicon and silicon germanium for long-wavelength pixel sensors. In some embodiments, an elemental silicon layer abuts a silicon germanium layer. A photodetector is at least partially buried in the silicon germanium layer and a transistor is arranged on a surface of the elemental silicon layer with a source/drain region electrically coupled to the photodetector. By arranging the photodetector in the silicon germanium layer, the photodetector advantageously has good sensitivity to and absorption of long-wavelength radiation, such as, for example, infrared radiation. Further, by arranging the transistor on the elemental silicon layer, conventional CMOS processes may advantageously be used when forming the transistor.

"...the semiconductor stack 102 comprises a silicon layer 104 and a silicon germanium layer 106. In some embodiments, the silicon germanium layer 106 partially covers an upper surface 108 of the silicon layer 104, and/or is buried in the upper surface 108 of the silicon layer 104. In other embodiments, the silicon germanium layer 106 is partially or fully covered by the silicon layer 104. The silicon and silicon germanium layers 104, 106 may correspond to epitaxial layers and/or regions of a semiconductor substrate, and the silicon layer 104 may be, for example, elemental silicon."

Another TSMC patent application US20170141148 "Infrared image sensor component and manufacturing method thereof" by Chien-ying Wu, Li-hsin Chu, Chung-chuan Tseng, Chia-wei Liu is somewhat similar, but integrates InGaAs sensing layer in a CMOS process flow:

"The infrared sensor component includes a substrate [110], a III-V compound layer [120] disposed on the substrate as an active pixel region, and a plurality of transistors formed on the III-V compound layer. The III-V compound layer is made of III-V groups materials, which have wide infrared wavelength coverage, large absorption coefficient in the infrared region, and high carrier mobility. Therefore, the performance of the infrared image sensor component can be improved accordingly."

Dual-CDS Evaluation

Journal of Semiconductor Technology and Science publishes a paper "Design and Evaluation of a CMOS Image Sensor with Dual-CDS and Column-parallel SS-ADCs" by Bu-Yong Um, Jong-Ryul Kim, Sang-Hoon Kim, Jae-Hoon Lee, Jimin Cheon, Jaehyuk Choi, and Jung-Hoon Chun from Sungkyunkwan University, Suwon, Korea and Kumoh National Institute of Technology, Gumi, Korea. The paper compares Sony-style analog-digital CDS (Exmor) with few other alternatives (seem randomly chosen). No surprises, Sony-style CDS comes on top in terms of column FPN:

Thursday, May 25, 2017

Dynamic Vision Sensor Presenation

Toby Delbruck, University of Zurich and ETH Zurich presented "Silicon retina technology" at IEEE CAS Workshop at University of Pavia, Italy, on March 20-21, 2017. The human retina only sees motion, the behavior that was mimicked by Dynamic Vision Sensors (DVS):

EETimes on Sony 3-Layer Sensor

EETimes publishes an article "Sony Launches First Three-Layer, 960 fps Camera with Sandwich-Stacked DRAM" by Dick James, Fellow Emeritus, TechInsights, based on Sony ISSCC 2017 paper and ThechInsights reverse engineering report:

Wednesday, May 24, 2017

CCM Market in China

China Securities Research publishes a report on Q Technology, the smallest of the top-three CCM suppliers in China, said to be "on the fast track in catching up with the market leaders and has become an early mover in FPM and dual-cameral modules (DCM)." A few interesting figures from the report:

Teledyne DALSA Opens its Line Scan Sensors for Sale

Marketwired: For more than 35 years, Teledyne DALSA has designed and manufactured what it calls the machine vision industry's best-in-class line-scan image sensors. Used in the company's line scan cameras, this class of sensors these sensors were not available as stand alone products. Now, DALSA has decided to offer them for sale, available immediately in resolutions from 2k to 16k.

SSD for Vision Data Storage

Nikkei: Prof. Ken Takeuchi group at Chuo University, Japan, proposes "Value-Aware SSD" that evaluates the value of image data and stores important and not-so-important data in high- and low-reliability flash memory cells, respectively. With that, it became possible to implement high-accuracy face recognition even when the error rate is 10%, which is 12 times higher than in existing SSDs. The data retention time of SSD was improved 300 times. In addition, the read speed was improved by 26% by minimizing the time it takes to correct memory errors.

Tuesday, May 23, 2017

Sony Image Sensor Growth Strategy

Sony has held a Corporate Strategy Meeting as a part of its IR Day discussing the business growth strategy and fiscal targets. Regarding the image sensor business, the company looks for "the image sensor for mobile use business to recover."

Sony CEO Kazuo Hirai says:

The IR Day slide deck updates on Sony Semiconductor Segment (SSS) business and plans: