Embedded Vision I/F WG has released "SLVS-EC IF Standard Version 3.0”. Version 3.0 supports up to 10Gbps/lane, which is 2x faster than Version 2.0, and improved data transmission efficiency.
SLVS-EC v3.0 Rx IP is an interface IP core that runs on Altera® FPGAs. Using this IP, you can quickly and easily implement products that support the latest SLVS-EC standard v3.0. You will also receive an "Evaluation kit" for early adoption.
Altera® FPGAs can receive signals directly from the SLVS-EC Interface.
Compatible with the latest SLVS-EC Specification Version 3.0.
Supports powerful De-Skew function. Enables board design without considering Skew that occurs between lanes.
"Evaluation kit”(see below) is available for speedy evaluation at the actual device level.
About SLVS-EC:
SLVS-EC (Scalable Low Voltage Signaling with Embedded Clock) is an interface standard for high-speed & high-resolution image sensors developed by Sony Semiconductor Solutions Corporation. The SLVS-EC standard is standardized by JIIA (Japan Industrial Imaging Association).
Emberion is introducing an extremely cost-effective SWIR sensor that covers a range from 400 to 2,000 nm and whose manufacturing costs for large quantities are less than €50. The sensors are smaller and lighter, which expands the application possibilities of this technology in a wide range of applications. They combine Emberion's existing patented Quantom Dot technology with the patented wafer-level packaging.
The unique SWIR image sensor’s manufacturing cost is less than 50€ in large volume production.
Espoo, Finland — 1.10.2024 — The current cost level of SWIR imaging technology seriously limits the use of SWIR imaging in a variety of industrial, defense & surveillance, automotive and professional/consumer applications. Emberion Oy, a leading innovator in quantum dot based shortwave infrared sensing technology, is excited to announce its new ultra-low cost SWIR (Short-Wave Infrared) sensor that brings the sensor production cost down to €50 level in large volumes. This revolutionary product is set to deliver high-performance infrared imaging to truly mass-market applications such as automotive and consumer electronics as well as enabling much wider deployment of SWIR imaging in industrial, defence and surveillance applications. The revolutionary sensors are also smaller in size and weight, further extending the possibilities to use this technology in a variety of use cases. Emberion is already shipping extended range high speed SWIR cameras and will bring first ultra-low cost sensor based products to the market in 2025.
Bringing Advanced Imaging to Everyday Devices at a fraction of current cost
The new Emberion sensor family is designed to make advanced shortwave infrared technology accessible to wider markets, including large volume markets such as automotive sensing and consumer electronics. The new ultra-low cost SWIR sensor combines Emberion’s existing patented quantum dot sensor technology with Emberion’s patented wafer-level packaging to drastically reduce the manufacturing costs of packaged sensors. Current InGaAs and quantum dot based image sensors are typically packaged in metal or ceramic casings with a total production cost for packaged imagers in the range of several hundred euros to a few thousand euros depending on sensor technology, imager wavelength range, packaging choices and production volumes. Emberion’s sensors are manufactured and packaged on a full wafer with up to 100 imagers on a single 8” wafer, making the production cost of a single sensor to be a fraction of current alternatives. In addition to low cost, the sensor enables high integration of functionality into the in-house designed read-out IC, reduces size and weight, and provides stability in performance, enabling new functionalities in everyday technology that were once only available in high-end or niche markets.
Examples of applications that require low-cost, compact sensors:
Automotive Industry: Enhanced driver assistance systems (ADAS) with improved visibility in demanding weather conditions for increased safety and performance.
Consumer Electronics: Integrating SWIR sensors into smartphones and wearable devices, allowing for facial recognition in all lighting conditions, gesture control, and material identification.
Augmented and Virtual Reality (AR/VR): Enabling more accurate environmental sensing for immersive, real-world interaction in AR/VR environments.
Drones: Precision vision systems for navigation and object detection in both consumer and defence markets.
Some of the key benefits of the Emberion SWIR sensor include:
Cost Efficiency: Thanks to wafer-level packaging, the production process is streamlined, making this sensor by magnitude more affordable than any existing SWIR solution. Also, the high sensor integration level with image processing embedded into the sensor decreases the need for image post processing significantly and decreases the need for camera components on system level.
Size, weight and power (SWaP) optimization: The miniature and power efficient design is ideal for space-constrained applications like consumer electronics and automotive components. The high sensor integration level is also a significant contributor to the system SWaP optimization.
Stability: The wafer-level packaging improves the sensor stability and protection and makes it suitable for demanding environments like automotive and outdoor applications. It can also be integrated into external packaging if needed, e.g. LCC or metal packaging.
Extended Wavelength Sensitivity: Covering a range from 400 nm to 2000 nm, ideal for detecting objects and scenes extending the spectral range beyond traditional SWIR sensors.
AVC Semiconductor completes a new round of financing of hundreds of millions of yuan to accelerate the localization of high-end CMOS image sensor chips
Recently, CVSENS successfully completed its A round of financing of hundreds of millions of yuan. The financing was led by Hanlian Semiconductor Industry Fund , and co-invested with Zhejiang University Education Foundation and Shanghai Anchuang Chuangxin , which indicates the market's high recognition and confidence in CVSENS.
As a leading CMOS image sensor chip developer in China, Chuangshi Semiconductor focuses on the design and development of high-value-added CMOS image sensor chips, and is committed to providing customers with better quality and more efficient services and products. With more than 15 years of experience in high-end product development, the core team of Chuangshi Semiconductor has broken through the core technology barriers of high-end CIS in various application fields. At present, more than ten CIS chips have been launched, all of which have been successfully taped out at one time, covering multiple application directions such as smart security, low-power IoT, smart cars, and machine vision. Many of the industry's first innovative products have won unanimous praise from clients. In the future, Chuangshi Semiconductor will continue to deepen its image sensor technology, promote industrial upgrading, and lead the new direction of industry development.
Hanlian Semiconductor Industry Fund said: We are optimistic about the huge development space in the field of image sensors and the market opportunities for domestic manufacturers. The Chuangshi Semiconductor team has excellent technical capabilities, business focus and product innovation capabilities, and is a new force in the industry with comprehensive competitiveness. At the same time, working with Chuangshi Semiconductor is an important part of Hanlian Semiconductor Industry Fund's layout in the field of vision. We hope that in the future, Chuangshi Semiconductor will work closely with other projects in our system to jointly develop first-class products and forward-looking innovative technologies in the industry, and provide better product solutions for more application scenarios.
Shanghai Anchuang Chuangxin Enterprise Management Consulting Partnership stated: As a corporate consulting and investment institution focusing on the high-tech field, we are very optimistic about the image sensor chip R&D team of AVC Semiconductor and its outstanding product innovation capabilities. This investment not only provides financial support for AVC Semiconductor, but also uses our ecosystem resources and industry-leading technologies to provide AVC Semiconductor with in-depth industrial links through innovation empowerment, helping to achieve longer-term development goals. We are full of confidence in participating in this investment in AVC Semiconductor, and look forward to helping AVC Semiconductor achieve greater success in technological innovation, market expansion and brand building, and work with AVC Semiconductor to create a new chapter in the image sensor industry.
The founder of AVC Semiconductor said: "I am very honored to receive joint investment from Hanlian Semiconductor Industry Fund, the Education Foundation of my alma mater Zhejiang University, and Shanghai Anchuang Chuangxin Enterprise Management Consulting Partnership. This is not only a recognition of AVC Semiconductor's past achievements, but will also help the company further promote technological innovation, enhance market competitiveness, and inject vitality into the company's long-term development. Since its establishment, AVC Semiconductor has been focusing on the research and development and innovation of CMOS image sensor chips. Its products and services are widely used in many fields such as automotive vision, smart security, low-power IoT, machine vision, and medical vision, constantly promoting technological progress and meeting market demand. We also look forward to working with more partners to jointly promote the innovative development of the image sensor industry."
Transvision Semiconductor will continue to take technological innovation as the core driving force, uphold the core concept of "gratitude, pragmatism and courage to innovate", actively seize market opportunities, continuously expand market share, strengthen industrial chain collaboration, and practice sustainable development, aiming to become a global leading CIS solution provider and provide customers with better quality and more efficient services and products.
The performance of an image sensor relies not only on its design and manufacturing but also on the packaging technology.
CIS packaging is particularly challenging, as any particle in the environment that drops on the sensor surface during the process can cause a significant affect on the final image quality. GalaxyCore’s COM (Chip on Module) packaging technology has revolutionized traditional CSP (Chip Scale Package) and COB (Chip on Board) methods, enhancing the performance, reliability, and applicability of the optical system of camera modules.
Birth of the COM Packaging
Before the advent of COM packaging, CSP and COB were the predominant packaging choices for CIS. CSP places a layer of glass on the sensor to prevent dust. However, the glass also reflects some light, thus degrading image quality. COB requires an exceptionally demanding environment, typically a Class 100 clean room.
Is there an alternative? GalaxyCore’s technical team developed an innovative solution by directly suspending gold wire to serve as pins. In the fantastic microscopic realm, the short gold wire becomes hard and elastic, which can used directly as pins.
At GalaxyCore’s Class 100 clean rooms in the packaging and testing factory in Jiashan City, Zhejiang Province, a fully-automated high-precision equipment bonds the gold wire to the image sensor with exacting accuracy. The sensor is then mounted on a filter base, and the other end of the gold wire is suspended as the pin. The pin is subsequently soldered by the camera module manufacturer to the FPCB. When assembled with a lens and the actuator, a complete camera module can be formed.
We were pleasantly surprised to discover that the performance and reliability of the COM packaging are on par with, or even exceed, those of high-end COB packaging.
Three Advantages for System-level Improvement
1. Enhanced Optical System Performance The COM packaging notably enhances the optical system performance of camera modules. In the COB packaging, the chip is directly mounted on the FPCB. However, the FPCB is prone to deformation during production, which may lead to the tilt of the optical axis and further affect the image quality. In GalaxyCore’s COM packaging, both the chip and lens use the filter base as the benchmark, thus mitigating the optical axis tilt caused by FPCB deformation. This significantly improves the edge resolution of images, especially in large aperture and high-pixel camera modules.
2. Improved Module Reliability and Flexibility In the COM packaging, due to a certain distance between the chip and the FPCB, the camera module is subject to greater back pressure, thus improving the reliability and durability of the module. In the COB packaging, the CIS directly mounted on the FPCB is more sensitive to the back pressure, and the SFR (i.e. image resolution) is more likely to be affected. By contrast, in the COM packaging, the CIS chip is relatively isolated and suspended, making it hard for the back pressure to directly act on the CIS chip. As such, a better image resolution can be achieved. Different from the COB packaging, the COM packaging connects the chip pins and pads through soldering. This solution reduces the material requirements for the FPCB and further enhances its adaptability and flexibility.
3. Minimized Module In the COM packaging, FPCB can be hollowed out to allow the chip to sink into it. Compared to the COB packaging with direct mounting of chip on the FPCB or reinforcement of steel sheets, the COM solution can control the back pressure more effectively and reduce the requirements for steel sheet thickness. This enhances the height advantage of the overall packaging module, to meet cell phones’ stringent requirements for space. This advantage is more notable in devices seeking thin and light designs.
GalaxyCore’s COM packaging ensures both high performance and reliability for the optical system while simplifying the subsequent production processes for module manufacturers. This method reduces the dependence on dust-free environments and enhances quality, yield, and efficiency. With the mass production of COM chips and further application of this technology, it will deliver improved imaging performance across a broader range of end products.
Electronic Imaging 2025 is accepting submissions --- late submission deadline is tomorrow (Oct 15, 2024). The Electronic Imaging Symposium comprises 17 technical conferences to be held in person at the Hyatt Regency San Francisco Airport in Burlingame, California.
Acquisition of Paris-based SWIR imaging provider expands Lynred’s product portfolio to include coveted large format shortwave sensors with small pixel pitch
Grenoble, France, October 7, 2024 – Lynred, a leading global provider of high-quality infrared sensors for the aerospace, defense and commercial markets, today announces its acquisition of New Imaging Technologies, a Paris-based shortwave infrared (SWIR) imaging modules and sensors provider. In a strategic move to consolidate its leadership in infrared sensors, Lynred’s product portfolio will expand to include high-definition large array SWIR sensors in small pixel pitch, bolstering its product offering across all wavelength bands (short to very longwave). The transaction is expected to close in Q4, 2024 and is subject to customary conditions.
The deal includes New Imaging Technologies’ large and innovative portfolio of SWIR products (imaging sensors and modules) and a portfolio of wide dynamic range patents. This enables Lynred to offer global customers large format SWIR sensors with advanced capabilities for applications in markets where AI, deep learning and multispectral imaging are driving growth. New Imaging Technologies (NIT) is the only European firm to manufacture and market a SWIR HD1080p array and associated module at a pixel size of 8µm, a key asset for several applications that Lynred will now leverage.
“Lynred’s acquisition of NIT is a growth accelerator. We will shorten time to market and leverage synergies in offering state-of-the-art SWIR products. The global market for SWIR infrared imaging for machine vision is growing fast, as well as for defense applications, such as laser detection and in new space,” said Hervé Bouaziz, executive president at Lynred. “NIT brings to Lynred the agility of a small, innovative organization, with an extensive product offering able to cater to our large customer base. As we share complementary industrial supply chains and technical skills, we can deliver highly competitive SWIR imaging sensors and modules to customers.”
This strategic acquisition is yet another significant investment Lynred is making in order to strengthen its leadership in infrared, a critical technology for a growing range of commercial applications and sovereign activities. In parallel, Lynred is investing significantly in its ongoing Campus project. Campus includes the construction of state-of-the-art clean rooms that will double Lynred’s current capacity.
Lynred and NIT will attend Vision Stuttgart in Germany (October 8-10), booth #8C46, and AUSA (October 14-16), in Washington DC, booth #8015, showcasing products based on the companies’ latest technological achievements. These two important trade shows will give them the opportunity to share further information and answer any questions about the acquisition.
Neil Na et al from Artilux and UMass Boston have published a paper titled "Room-temperature photonic quantum computing in integrated silicon photonics with germanium–silicon single-photon avalanche diodes" in APL Quantum.
Abstract: Most, if not all, photonic quantum computing (PQC) relies upon superconducting nanowire single-photon detectors (SNSPDs) typically based on niobium nitride (NbN) operated at a temperature <4 K. This paper proposes and analyzes 300 K waveguide-integrated germanium–silicon (GeSi) single-photon avalanche diodes (SPADs) based on the recently demonstrated normal-incidence GeSi SPADs operated at room temperature, and shows that their performance is competitive against that of NbN SNSPDs in a series of metrics for PQC with a reasonable time-gating window. These GeSi SPADs become photon-number-resolving avalanche diodes (PNRADs) by deploying a spatially-multiplexed M-fold-waveguide array of M GeSi SPADs. Using on-chip waveguided spontaneous four-wave mixing sources and waveguided field-programmable interferometer mesh circuits, together with the high-metric SPADs and PNRADs, high-performance quantum computing at room temperature is predicted for this PQC architecture.
Schematic plot of the proposed room-temperature PQC paradigm with integrated SiPh using the path degree of freedom of single photons: single photons are generated through SFWM (green pulses converted to blue and red pulses) in SOI rings (orange circles), followed by active temporal multiplexers (orange boxes that block the blue pulses), and active spatial multiplexers (orange boxes that convert serial pulses to parallel pulses) (quantum sources), manipulated by a FPIM using cascaded MZIs (quantum circuits), and measured by the proposed waveguide GeSi SPADs as SPDs and/or NPDs (quantum detectors). An application-specific integrated circuit (ASIC) layer is assumed to be flipped and bonded on the PIC layer with copper (Cu)–Cu pillars (yellow lines) connected wafer-level hybrid bond, or with metal bumps (yellow lines) connected chip-on-wafer-on-substrate (CoWoS) packaging. The off-chip fiber couplings are either for the pump lasers or the optical delay lines.
(a) Top view of the proposed waveguide GeSi SPAD, in which the materials assumed are listed. (b) Cross-sectional view of the proposed waveguide GeSi SPAD, in which the variables for optimizing QE are illustrated.
(a) QE of the proposed waveguide GeSi SPAD without the Al back mirror, simulated at 1550 nm as a function of coupler length and Ge length. (b) QE of the proposed waveguide GeSi SPAD with the Al back mirror, simulated at 1550 nm as a function of gap length and Ge length. (c) QE of the proposed waveguide GeSi SPAD with the Al back mirror, simulated as a function of wavelength centered at 1550 ± 50 nm (around the C band) and 1310 ± 50 nm (around the O band), given the optimal conditions, that is, coupler length equal to 1.4 μm, gap length equal to 0.36 μm, and Ge length equal to 14.2 μm. While the above data are obtained by 2D FDTD simulations, we also verify that for Ge width >1 μm and mesa design rule <200 nm, there is little difference between the data obtained by 2D and 3D FDTD simulations.
Dark current of GeSi PD at −1 V reverse bias, normalized by its active region circumference, plotted as a function of active region diameter. The experimental data (blue dots) consist of the average dark current between two device repeats (the ratio of the standard deviation to the average is <2%) for five different active region diameters. The linear fitting (red line) shows the bulk dark current density and the surface dark current density with its slope and intercept, respectively.
For the scheme of photon-based PQC: (a) The probability of successfully detecting N photon state and (b) the fidelity of detecting N photon state, using M spatially-multiplexed waveguide GeSi SPADs at 300 K as an NPD. (c) The difference in the probabilities of successfully detecting N photon state, and (b) the difference in the fidelities of detecting N photon state, using M spatially-multiplied waveguide GeSi SPADs at 300 K and NbN SNSPDs at 4 K as NPDs. Note that no approximation is used in the formula for plotting these figures.
For the scheme of qubit-based PQC: (a) The probability of successfully detecting N qubit state, and the fidelity of detecting N qubit state, using single waveguide GeSi SPADs at 300 K as SPDs. (b) The difference in the probabilities of successfully detecting N qubit state, and the difference in the fidelities of detecting N qubit state, using single waveguide GeSi SPADs at 300 K and NbN SNSPDs at 4 K as SPDs. Note that no approximation is used in the formula for plotting these figures.
