Caeleste monthly newsletter that I was kindly offered to subscribe to has a more detailed description of its 4T pixel with 0.5e- noise:
"After reduction of kTC, EMI and thermal noise, the fundamental limit in noise in CMOS 4T pixel is the 1/f noise contribution of the source follower. It is generally accepted that the 1/f noise and RTS noise in MOSFETs is adequately explained and modeled by the McWorther theory. Charge carriers in the MOSFET’s inversion layer are captured and released, by interface states or oxide traps, acting as spurious energy levels inside the band gap. Traps that have energies close to the Fermi level of the MOSFET channel have an equilibrium occupancy probability that obeys the Fermi-Dirac statistics. For a given trap energy level, one may have a huge spread of emission and capture time constants.
In literature it is observed that this time correlation between samples can be broken by periodically pulsing the MOSFET to accumulation between samples. When returning to inversion, the long term “memory” of the trap has disappeared. The MOSFET’s noise spectrum becomes white, the signature of “uncorrelation”. Caeleste patented pixel includes a simple, compact charge trans-impedance amplifier (CTIA). The feedback capacitance is the gate-drain overlap of the driver MOSFET, and in the order of 0.1fF, resulting in an effective CVF between 1000 and 1100 μV/electron. The uncorrelation between samples allows the column electronics to reduce the (1/f) noise by Oversampling."