Wednesday, September 17, 2014

MIPI Alliance Officially Releases C-PHY v1.0, D-PHY v1.2, and M-PHY v3.1 Specs

Business Wire: MIPI Alliance introduces the new C-PHY spec, a physical layer interface for camera and display applications. "The MIPI C-PHY specification was developed to reduce the interface signaling rate to enable a wide range of high-performance and cost-optimized applications, such as very low-cost, low-resolution image sensors; sensors offering up to 60 megapixels; and even 4K display panels," said Rick Wietfeldt, chair of the MIPI Alliance Technical Steering Group.

MIPI C-PHY departs from the conventional differential signaling on two-wire lanes and introduces 3-phase symbol encoding of about 2.28 bits per symbol to transmit data symbols on 3-wire lanes, or “trios” where each trio includes an embedded clock. Three trios operating at the C-PHY v1.0 rate of 2.5 Gsym/s achieve a peak bandwidth of 2.5 Gsym/s times 2.28 bits/symbol, or about 17.1 Gbps over a 9-wire interface that can be shared, if desired, with the MIPI D-PHY interface.

The MIPI Alliance also announces updates to the MIPI D-PHY and MIPI M-PHY physical layer technologies. The updated MIPI D-PHY specification, v1.2, introduces lane-based data skew control in the receiver to achieve a peak transmission rate of 2.5 Gbps/lane or 10 Gbps over 4 lanes, compared to the v1.1 peak transmission rate of 1.5 Gbps/lane or 6 Gbps over 4 lanes. The MIPI M-PHY v3.1 specification introduces transmitter equalization to improve support for challenging channels while maintaining the peak transmission rate of 5.8 Gbps/lane or 23.2 Gbps over 4 lanes, which was achieved in its v3.0 specification.

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