GMAX3265 offers 9344 (H) x 7000 (V) charge global shutter pixels with read noise of less than 2e-, higher than 70dB DR, and 1e-/p/s dark current at room temperature. Due to the light pipe technology, the sensor exhibits excellent shutter efficiency of 1/30,000 and large angular response.
Consisting of 56 pairs sub-LVDS data output channel and each running at maximum 1.08 Gbit/s, GMAX3265 delivers 85 fps at 10bit output or 53 fps at 12bit output. The high resolution and fast frame rate significantly increases the system throughput for industrial inspection applications, such as semiconductor, PCB, AOI or display inspection.
“We understand short time-to-market is essential in today’s competing environment, and at Gpixel, we put a lot of effort in technical and logistic support to enable customers a fast go to market timing. This combined with our long term commitment and product strategy is essential for the success of our growing customer base and Gpixel.”, said Wim.
GMAX3265 will begin sampling in early Q4 2018, with mass production scheduled in end of Q1 2019 for both color and mono version.
the GMAX family could cause some Emerald headache...
ReplyDeleteGood job!
ReplyDeleteCharge domain GS is absolutely superior to voltage domain GS particularly in terms of low light SNR.
Already flyer is on the manufacturer's website.
ReplyDeletehttp://431.300.cn/xiaoming/xinpian/GMAX3265_flyer_EN_20180920.pdf
So what is the die size, from the picture it looks like it's a stacked chip, is that true? What's the technology nodes on pixel and logic and what's the bonding technology?
ReplyDeleteActive area is 29.9mm x 22.4mm, if you calculate it.
[1] Lack of 1:1 aspect ratio seems a weird product choice for MV applications
ReplyDelete[2] Enormous amount of LVDS IO (56), still a bit better than Emerald 67M's 72 IO.
System/board level complexity rises...skew-balanced routing will be quite an endeavour.
[3] Assuming reticle-size dimensions, the sensor's H-resolution leaves little room L/R.
Most likely the on-chip power management integration level (LDO, charge pump...) is not advanced...pushing the burden to the system/board-level. Let's wait and see what the datasheet says.
[4] Single-side readout architecture complicates optical center offset mitigation/control.
[1] : flat panel displays have seldomly a 1:1 aspect ratio, similar with many large PCB's ... Although rumours are, a 7kx7k variant will be offered as well.
DeleteAgreed.
DeleteIt's tower techno, only FSI, not BSI and for sure not stacking
ReplyDeleteNo stacking...sensor readout is clearly visible on the die.
ReplyDeleteThis is correct. The readout region looks very small because the sensor size is big.
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