Wednesday, September 22, 2010

Fraunhofer Institute Developed Wide Temperature Range Sensor

Fraunhofer Press, Photonics.com: The Fraunhofer Institute for Microelectronic Circuits and Systems IMS in Duisburg has developed a CMOS image sensor for an industrial customer which can operate at temperatures ranging from -40 to +115 degrees Celsius. The research scientists have succeeded in developing pixels which exhibit an extremely low dark current. This reduction makes it possible to capture high-quality images even in extreme heat.

The sensor has a resolution of 256 x 256 pixels and an image size of 2.5 x 2.5 centimeters, translating into 100um pixels. The reported DR is 90dB. The sensor supports both global and rolling shutter. The chip is produced in 0.5um CMOS process.

10 comments:

  1. Two things are mentioned in the press release :
    - the new imager has a low dark current, how low is a low dark current ?
    - a CCD fails at temperatures higher than 60 deg.C. This ABSOLUTELY not correct. I operated CCDs up to 180 deg.C during my cosmic-ray radiation experiments without any problem.

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  2. too many fake annoncement today, what a pitty !

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  3. I saw the presentation at ESSCIRC some days ago (it should be the same). The principle is, I would say, trivial: the enhanced FWC is achieved by a large (>photodiode!) capacitor on the SF node. The low dark current by removing the surface-related issues with a grounded p-diffusion on top, bringing to low resp at lower wavelenghts.

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  4. what kind of applications in machine vision needs a so large pixel size and so low resolution ??

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  5. "temperatures ranging from -40 to +115 degrees Celsius" is this ambient or junction temperature ??

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  6. "The low dark current by removing the surface-related issues with a grounded p-diffusion" So is this a pinned photodiode, which is fully depleted and allows for real CDS? Or do they have a non-fully depleted photodiode? Both is nothing special and/or new, right?

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  7. I think (!!!) it is a classical 3T pixel of which part of the photodiode has a p+ pinning layer. In that case it is not a 4T pixel, but still a classical 3T with a lower dark current. I have no idea whether the structure underneath the p+ is depleted or not. For dark current reasons full depletion is not necessary. I have not seen any pixel structure/lay-out/architecture, so what is mentioned here is a guess.

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  8. From the ESSCIRC paper:
    * It's a classical 3T pixel with a "shutter" transistor between the PD and the SF, and an antiblooming transistor. The device is described in a JSSCC paper from July 2008 (Durini et al.).
    * The n-well is not fully depleted
    * Dark current: "The standard n-well PD delivers 750fA at room temperature (25°C ) in contrast to the 100fA delivered by the BPD of the same area, while delivering 400pA at 110°C in contrast to the 76pA delivered by the BPD."

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  9. The p+ is the conventional S/D implant, no pinning...

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  10. @ ambient or junction

    I'd say ambient. Probably the numbers aren't precise anyway since this is a publicity announcement, so maybe the junction temperature at the maximum ambient is a little or even a lot higher.

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