PR Newswire: MIPI Alliance and the USB 3.0 Group will facilitate the combined use of the MIPI M-PHY(SM) physical layer with the SuperSpeed USB protocol and software layers to produce the SuperSpeed Inter-Chip (SSIC) specification. Currently under development, the spec will bring M-PHY's high bandwidth and low power, and the performance enhancements of SuperSpeed USB "inside" the mobile device interface system. The two groups anticipate the SSIC specification will be available to USB adopters in early 2012.
Essentially it brings the unification between PC and mobile worlds, allowing same MIPI-interfaced sensors be used for both. So far M-PHY interface works up to 2.9 Gbps per lane with up-scalability to 5.8 Gbps per lane, while SuperSpeed USB has a 5 Gbps signaling rate.
Update: EETimes published an article on MIPI-USB marriage.