Monday, November 23, 2015

0.27e− rms Read Noise Sensor Paper

IEEE Electron Device Letters publishes an open-access paper "A 0.27e− rms Read Noise 220-μV/e− Conversion Gain Reset-Gate-Less CMOS Image Sensor With 0.11-μm CIS Process" by Min-Woong Seo, Shoji Kawahito, Keiichiro Kagawa, and Keita Yasutomi. "To achieve a high pixel conversion gain without fine or special processes, the proposed pixel has two unique structures: 1) coupling capacitance between the transfer gate and floating diffusion (FD) and 2) coupling capacitance between the reset gate and FD, for removing parasitic capacitances around the FD node:"

Proposed HCG pixel. (a) Cross-section of the proposed pixel for
reducing the parasitic capacitance of floating diffusion. (b) Potential
diagram as a function of the voltage level of VRTH.
Photoelectron-counting histrograms with a theoretical Poisson
distribution of the developed CMOS imager (@ 100,000 points,
230 LSB/e− using internal ADC). (a) Signal level λ = 2.05.
(b) Signal level λ = 4.0.

This is close to 0.22e- rms noise reported in an earlier paper.

Thanks to EF for the link!

22 comments:

  1. Read through the paper, it mentioned experiment is under -10C, I believe under room temperature this is not close to Eric's pixel design. For a real Q imager, I think people needs to make pixel much smaller to a level which will definitely violate the half wavelength.

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    1. This is a large pixel which may be useful for many scientific applications. I think the results are quite nice (which is why I alerted Vlad). I expect to welcome a number of new members to the "deep sub-electron read noise" club in the year ahead. (noise < 0.5e- rms, allowing photon counting). While the non-avalanche approaches probably won't achieve the time resolution of SPADS, I predict they will overtake SPADs and EMCCDs within 5 years for low light imaging with megapixel counts. Nice work Shoji & team.

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    2. For typical applications, you wouldn't want a camera only good at low light imaging but not so good at high light, would you? So it still goes back to the full well and dynamic range. If lower noise is achieved via higher conversion gain, would the full well and dynamic range be compromised at the same time?

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    3. In the Quanta Image Sensor (and Digital Integration Sensor - IISW 2013) concepts, dynamic range is achieved through high frame rate readout (with lower resolution ADC) and then digitally integrating or processing the data.
      I think the work discussed by Shizuoka is to try to get it all in one shot. Still, their full well is only about 1000e-, and ours was a few hundred, so not significantly different. We could easily boost ours to 1000e- if we wanted to but that is not enough in my opinion. I prefer the low full well, digital integration route.

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    4. I should add that that is why I have moved to "flux capacity" as a metric rather than "full well".

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    5. Increasing gain to reduce the input referred downstream noise is not something I would call path-breaking. Because when you do that, you trade-off your dynamic range.

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    6. Really? I think you missed the point if you don't think this digital integration approach is "path-breaking." If you can count electrons, the read noise is almost negligible, and summing frames is almost noiseless.

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    7. it will give the same DNR after over-sampling.

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    8. @ "If you can count electrons, the read noise is almost negligible, and summing frames is almost noiseless."

      Actually, there is a way of summing frames noiselessly also in the case with a more usual read noise of 2-3e or so. We have filed a patent on this some time ago. I can post few slides with explanations, if there is an interest.

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    9. Please do so, really curious to read your slides! thx in advance!

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    10. Even multi-capture with dark and light can only bring you to a certain noise level, but noise still exist. If your method is different, it would be very nice to see how it works.

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    11. Yes, Vlad, please; it sounds very interesting.

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    12. Sure, I will post it today or tomorrow. Just need some time to prepare them.

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  2. The classical quantization noise of an ADC is (1/sqrt(12)) LSB = 0.289 LSB. The number of electrons is quantized. So could the read noise be smaller than the 0.289e quantization noise? What is wrong here?

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    1. Here you are comparing ADC quantization noise in LSB and Noise in e-. Noise of 0.27e- here is 0.27e-*230LSB/e- = 62LSB, which is way above the quantization noise.

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    2. the CG is 230uv/e- not 230LSB/e-

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  3. large part of noise could be reduced by image processing since sampling speed is so fast. it's like a sigma~delta from the first stage.

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  4. I thought a dominant floating node capacitance was source follower gate capacitance.
    What is the suitable source follower device W/L size?

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  5. Due to some of the questions posted I thought I'd remind you of Andor's Webinar about sCMOS, EMCCD, and single Photon counting: https://www.youtube.com/watch?v=2lHrdGxX5ew&list=PLWa6uO3ZUweAZ-VXnnBsDDsBbz32BLlYf . About halfway through it is explained where given a few times as many Photons one can abandon EMCCD for lower cost sCMOS. Also explained is how the signal can be multiplied while introducing negligible noise.

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    1. The video also has been posted in the blog some time ago:

      http://image-sensors-world.blogspot.com/2014/12/andor-compares-emccd-and-cmos-cameras.html

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    2. I guess Andor needs to update their 2014 video as the advantages of EMCCDs fade. Of course there is no non-avalanche CMOS-based photon counting image sensor on the market yet, so no rush.

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