Friday, October 09, 2026

Programmable readout pixel

In a paper titled "A Programmable Readout Pixel Image Sensor" Lazzaro et al. from Dartmouth write:

In this paper, a pixel architecture that can be re-programmed to favor low noise, high speed, high dynamic range, or other characteristics desired in scientific imaging is proposed. Termed a programmable readout (PRO) pixel, this novel design combines a pinned photodiode, a deep-buried-channel CCD router, and multiple in-pixel amplifiers of different characteristics. By clocking the CCD router with different sequences, photogenerated charge can be steered to an appropriate readout amplifier given the application. The CCD router can be further programmed to store charge from multiple frames. The concept of such a pixel and its operation are described in detail and TCAD simulations aid in this discussion. To demonstrate this concept of programmability, a test chip is made with a CCD router and two in-pixel amplifiers: a floating diffusion amplifier (FDA) for fast readout and high-illumination imaging and a floating gate amplifier (FGA) for a low-noise Skipper-in-CMOS readout for low-light imaging. The test chip contains a 36 × 94 array of 20 µm pixels and contains 9 different pixel variants for experimental analysis. At the end of the paper, preliminary images captured from the different amplifiers are presented which demonstrate the ability to move charge to the selected readout while showcasing the different output characteristics of the two readout amplifiers. Furthermore, the output image from the Skipper-in-CMOS is compared across different numbers of non-destructive samples to demonstrate its noise-reduction capability.

Open access link: https://www.mdpi.com/1424-8220/26/16/5245

Figure 1. (a) PRO pixel concept with an adjacent PPD. (b) PRO pixel concept with a centered PPD. Both designs allow for readout by four different amplifiers of different characteristics.


 

 Figure 2. Test chip 20 × 20 μm PRO pixel showing simplified plan-view layout.


 Figure 11. (a) Test image captured using a 100 ns exposure time and the floating diffusion amplifier. (b) Test image captured using a 500 µs exposure time and the floating diffusion amplifier. (c) Test image captured using a 100 ns exposure time and the floating gate amplifier. (d) Test image captured using a 500 µs exposure time and the floating gate amplifier. It is noted that the horizontal bands are due to different pixel designs on those rows. 

7 comments:

  1. Feels like a paper from 1990s. Lol

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    1. The building blocks are indeed old (floating-gate resampling dates to 1975, the Skipper CCD to 1990), and so far this is a concept demo: noise, charge transfer efficiency and dark current come only from TCAD/SPICE predictions, and the images are qualitative. What’s new is run-time routing of the same charge packet through an in-pixel buried-channel CCD to either a fast floating-diffusion readout or a non-destructive Skipper floating-gate readout, targeting <0.5 e⁻ rms within 50 samples at room temperature in a 180 nm process (vs. 0.15 e⁻ after 3025 samples at 118 K in prior Skipper-in-CMOS), so the promised characterization will decide whether this matters.

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    2. Perhaps wait and publish in a worthy journal when you have the measured results. It just doesn’t look like to be a serious work or paper!

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  2. A couple of these anonymous comments remind me of the 90's, except there was no ISW Blog in those days. But, it is a sad day when one cannot publish papers to introduce concepts, whether smart imaging via focal plane image processing, challenging CCD dominance, proposing imaging by counting photons, or in this case, using a CCD in a CMOS process to deliver charge packets to different amplifiers in a pixel, depending on the desired imaging modality. Think about it, edge sensing for AI/SI is a lot more useful if SI can switch imaging modality in a programmable way on the fly. The cost is obviously fill factor today, but maybe not tomorrow. There are other applications too, where such a P.R.O. concept might be helpful and cost-effective.

    I am proud of my students for their hard work bringing this concept to life, for demonstrating that functionality on first silicon, and sharing our ideas with the community. As an image sensor community, we need to be supportive of next-gen student research exploration and not make discouraging remarks. And besides, quantitative characterization, since the subject paper was submitted, has been promising and will likely be reported in a forthcoming more focused paper - less on concepts, more on experimental results. That's the way new ideas come to life or lead to better concepts later.

    As a final comment, I note that IISW came into being 40 years ago to fight against the culture that only finished products should be presented at conferences and in papers, and that work in progress is unworthy of publication. It has worked out pretty well for our community.

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    1. It’s AI not SI.

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    2. I’m afraid you forgot to end your statement by saying “thanks for your attention to this matter!” Lol

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    3. why always so defensive...

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