Just published IEDM 2008 program has many interesting presentations on image sensors:
A 36x48mm2 48M-pixel CCD Imager For Professional DSC Applications,
E.-J. Manoury, W. Klaassens, H. van Kuijk, L. Meessen, A. Kleimann, E. Bogaart, I. Peters, H. Stoldt, M. Koyuncu, J. Bosiers, DALSA Professional Imaging
A 48M-pixel, 6kx8k, 36x48mm2 full-frame CCD imager was developed for professional digital SLR cameras and digital camera backs. Compared to the previous generation, the pixel size was reduced by 30% from 7.2x7.2um2 to 6.0x6.0 um2 to meet the demands for higher resolution. Still, by improvements in technology and design, the SNR under identical exposure conditions was increased by 30%.
A High-Sensitivity Broadband Image Sensor using CuInGaSe2 Thin Films,
O. Matsushima, K. Miyazaki, M. Takaoka, M. Moriwake, H. Takasu, S. Ishizuka*, K. Sakurai*, A. Yamada*, S. Niki*, Rohm Corporation Limited, *National Institute of Advanced Industrial Science & Technology
We report a novel CMOS image sensor using CuInGaSe2 thin films. The combination of LSI and solar cell technologies has realized a novel CMOS image sensor that outperforms conventional crystalline Si CMOS image sensors. The newly developed CuInGaSe2 thin film image sensor shows considerable higher sensitivity and wider spectral range.
Setting up 3D Sequential Integration for Back-Illuminated CMOS Image Sensors with Highly Miniaturized Pixels with Low Temperature Fully Depleted SOI Transistors,
P. Coudrain, X. Gagnard, C. Leyris, Y. Cazaux*, B. Giffard*, P. Magnan**, P. Ancey, STMicroelectronics, *CEA LETI-MINATEC, **Institut Superiéur de l'Aéronautique et de l'Espace
We present a comprehensive study of 3D sequential technology having the capabilities to become a breakthrough in CIS miniaturization. Back-illuminated pinned photodiodes are constructed on SOI, while part of the pixel transistors is processed on a second SOI layer with HfO2/TiN gates at low temperature, targeting low noise levels.
Advanced Image Sensor Technology For Pixel Scaling Down Toward 1.0µm (Invited),
J.C. Ahn, C.-R. Moon, B. Kim, Y. Kim, M. Lim, W. Lee, H. Park, K. Lee, K. Moon, J. Yoo, Y.J. Lee, B.J. Park, S. Jung, J. Lee, T.-H. Lee, Y.K. Lee, J. Jung, J.-H. Kim, T.-C. Kim, H. Cho, D. Lee, Y. Lee, Samsung Electronics
As pixel size of image sensors shrinks down toward 1.0um, we are reaching technical barrier to get the required SNR10 performance. To overcome such a barrier, integration of advanced technologies such as back-side illumination, WC CFA, EDoF technologies, etc. are described and improvement for small pixel size is estimated.
A short course program features CMOS Imaging tutorial by Albert Theuwissen.
Thanks to A.T. for letting me know.
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