Sunday, October 21, 2012

Aptina on 1-inch Sensor Size Opportunity

DPReview published an interview with Sandor Barna, VP and GM of Aptina's Consumer Camera BU, talking about the opportunities to bridge the gap between APS-C DSLRs and compact cameras with Aptina's 1-inch AR1011HS sensor. The 10MP sensor is based on 3.4um pixels and features extended DR with DR-Pix technology and 4K60 video.

Sandor says on double-gain DR-Pix pixel size scaling: "We've tried to apply DR-Pix in pixels as small as 2.5 microns, and we might ever get it down to 2.2 microns".

10 comments:

  1. http://www.securityelectronicsandnetworks.com/NewsDetail/12-10-04/sony_electronics_acquires_pixim_incorporated.aspx
    Any comments here??

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    1. Being Pixim employee, I can not comment on this. Sorry.

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    2. Hmm, this is a rather interesting development. No blog entry for it?

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    3. I have to comply with my employer regulations. So far I'm forbidden to give any public comment, post or message on that.

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    4. Post as an anonymous user. No one will ever know!

      (Whoops! I might have given it away now.)

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  2. Congrats to Pixim!

    When Sony announced their stacked sensor technology, many speculated that it will be used for per-pixel ADCs.

    And here's what the Security Electronics article says. Coincidence?

    "The core invention of DPS is the inclusion of an analog-to-digital converter (ADC) within each pixel of the image sensor. "

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    1. We may want to hold back on congrats until we know more about the deal. Was this a partnership agreement to join forces, a hard-won (and expensive) concession by Pixim invostors, or a fire sale? Most of us don't know. How much money changed hands? Does Sony intend to develop this further, or shelve the technology after getting it for a pittance?

      Pixim has not been looking very dynamic lately, and until I know more I'm inclined to think that this was not a successful story.

      I hope they do better within Sony. Maybe their technology will be able to benefit from Sony's BSI, perhaps at least some of the huge peripheral circuitry visible on their die can indeed go on the stacked logic die. If Sony wants to make it happen, that is.

      Regarding the stacked sensor technology, I have not seen any public evidence that this involves in-pixel connections between wafers. I'm doubtful, if only because of one feature that was boldly missing from the list of advantages they published back then: global shutter. Wouldn't they do this first of all if they could reliably connect the two die at the pixel pitch? So I also doubt that the Pixim in-pixel ADC will migrate to the second wafer. But maybe it will, after all their pixel pitch is way looser than in the mobile imagers Sony targeted first.

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  3. What is the most fundamental patent on DPS please??

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  4. Are the any functions a pixel ADC can do and column based one cannot?

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    1. Well, it is easier to have "memory" for that pixel in a parallel architecture, depending on pixel size. But just for ADC, column parallel has more chip area but has to run faster.

      Regarding DPS, there must be some patents for Stanford or Pixel that are particular to their implementation. The idea of ADC in the pixel is much older than that work however so no fundamental patent on DPS that I know of.

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