Image Sensors at ISSCC 2010

ISSCC published its Advance 2010 Program with 9-paper session devoted entirely to image sensors. All papers appear quite interesting this year.

Sony brings its 1.75um BSI pixels to perfection with huge full well, high sensitivity, low noise, and very fast, presented in the paper:

A 1/2.3-inch 10.3Mpixel 50 frame/s Back-Illuminated CMOS Image Sensor

H. Wakabayashi, K. Yamaguchi, M. Okano, S. Kuramochi, O. Kumagai, S. Sakane1, M. Ito, M. Hatano, M. Kikuchi, Y. Yamagata, T. Shikanai, K. Koseki, K. Mabuchi, Y. Maruyama, K. Akiyama, E. Miyata, T. Honda, M. Ohashi, T. Nomoto
Sony, Atsugi, Japan
Sony Semiconductor, Nagasaki, Japan

A 1/2.3-inch 10.3Mpixel 50frame/s CMOS image sensor fabricated using a 0.13μm 1P4M CMOS process with back-illumination technology achieves sensitivity of 9890e-/lux·s, random noise of 1.7e- and saturation of 8850e-. The sensor integrates a 10b/12b analog-to-digital converter, an internal PLL and a 10b serial LVDS interface to enable a data-rate up to 576MHz.

Panasonic presents a new idea for its 4K2K sensor. I'm unable to grasp their idea, but it sounds quite different from the most sensor's timing. I hope they explain it better in the paper:

A 2.2/3-inch 4Kx2K CMOS Image Sensor Based on Dual Resolution and Exposure Technique

T. Azuma, T. Imagawa, S. Ugawa, Y. Okada, H. Komobuchi, M. Ishii, S. Kasuga, Y. Kato
Panasonic, Kyoto, Japan
Panasonic, Takatsuki, Japan

A 2.2/3-Inch 4K2K dual resolution and exposure CMOS imager uses motion information to improve the sensitivity by 4 times in comparison to a conventional sensor. The green pixels are read out once every four frames for high sensitivity. Both the red and blue pixels are read out each frame, binned for 2×2 and used for motion compensation.

Toyota and Shizuoka University present a sensor for spatial optical communication. Its hard to say what is special about their system, as some already deployed products have much better speed and range. I hope the paper answers on this:

A CMOS Image Sensor for 10Mb/s 70m-Range LED-Based Spatial Optical Communication

S. Itoh, I. Takai, M. Z. Sarker, M. Hamai, K. Yasutomi, M. Andoh, S. Kawahito

Shizuoka University, Hamamatsu, Japan
Toyota Central R&D Labs, Aichi, Japan

A CMOS image sensor for spatial optical communication is presented. A two-transistor optical communication cell with a depleted photodiode and lateral charge overflow drain improves the light pulse response. A weighed summation of 9-point parallel analog outputs and pulse equalizing technique greatly enhance the bit-rate and communication distance up to 10Mb/s and 70m, respectively.

Samsung and Yonsei University present fast low noise sensor with sigma-delta column-parallel ADC:

A 2.1Mpixel 120frame/s CMOS Image Sensor with Column-Parallel ΔΣ ADC Architecture

Y. Chae, J. Cheon, S. Lim, D. Lee, M. Kwon, K. Yoo, W. Jung, D-H. Lee, S. Ham, G. Han
Yonsei University, Seoul, Korea
Samsung Electronics, Yongin, Korea

A 2.1Mpixel 120frame/s CMOS image sensor with column-parallel ΔΣ ADCs is realized in a 0.13μm CMOS process. Column-parallel ΔΣ ADC architectures improve the conversion speed while reducing the random noise level as well. Inverter-based SC circuits maximize the power efficiency. This sensor achieves a measured noise floor of 1.9e-, while dissipating 180mW.

Another interesting paper from Samsung touts "Pseudo-Multiple Sampling" to achieve very low noise:

A 1.1e- Temporal Noise 1/3.2-inch 8Mpixel CMOS Image Sensor using Pseudo-Multiple Sampling

Y. Lim, K. Koh, K. Kim, H. Yang, J. Kim, Y. Jeong, S. Lee, H. Lee, S-H. Lim, Y. Han, J. Kim,
J. Yun, S. Ham, Y-T. Lee
Samsung Electronics, Yongin, Korea

A pseudo-multiple sampling technique for a low-noise CIS is implemented using a conventional column-parallel single-slope ADC structure with no additional circuitry. It is applied to a 1/3.2-inch 8Mpixel CIS. Measurement results show the technique effectively reduces dark temporal noise from 1.6e- to 1.2e- in 10b ADC mode, and from 1.8e- to 1.1e- in 12b ADC mode.

Shuzuoka University presentas HDR sensor with global shutter:

A 2.7e- Temporal Noise 99.7% Shutter Efficiency 92dB Dynamic Range CMOS Image Sensor with Dual Global Shutter Pixels

K. Yasutomi, S. Itoh, S. Kawahito
Shizuoka University, Hamamatsu, Japan

A dual global shutter CIS with pinned storage diode and floating diffusion memory enables a low noise level of 2.7e- and wide dynamic range of 92dB. Dual doping pinned diodes with a shielding structure attain a high shutter efficiency of 99.7%.

Austrian Institute of Technology presents even wider DR sensor:

A QVGA 143dB Dynamic Range Asynchronous Address-Event PWM Dynamic Image Sensor with Lossless Pixel-Level Video Compression

C. Posch, D. Matolin, R. Wohlgenannt
Austrian Institute of Technology, Vienna, Austria

A 0.18μm CIS contains a QVGA array of autonomous pixels that individually detect illumination changes and communicate new gray levels that are PWM encoded after each detected change, ideally realizing optimal lossless pixel-level video compression. Readout is frame-free 18b parallel AER. SNR of >56dB and intra-scene DRs of 143dB static and 125dB at 30fps equivalent have been achieved.