The sensor is based on 4T shared pixel with a pitch of 2.5um and a conversion gain of 70 μV/e-, which allows for both a classical rolling shutter or stagger-laced scanning mode. The sensor has 12-bit column-based delta-sigma ADCs. The stagger-laced scanning method improves imaging sensitivity and realizes a 50% reduction in output data rate by alternating the readout of two sets of horizontal pixel pairs arranged in two complementary checkerboard patterns. The overall power consumption of the imager is less than 2W.
“This is an important milestone for imec to demonstrate our capability to co-design, prototype and manufacture high performance CMOS image sensors in our 200 mm CMOS fab,” commented Rudi Cartuyvels, SVP of Smart Systems & Energy Technologies at imec.
Imec-Panasonic 2k4k Sensor |
No mention of "measured" performance data. numbers please?
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