Tuesday, December 27, 2011

1/f and RTS Noise Reduction

As mentioned in Theses post, Oregon State University published Drake A. Miller's PhD Thesis "Random Dopants and Low-Frequency Noise Reduction in Deep-Submicron MOSFET Technology". The thesis is quite rich in experimental data os pixel source follower noise. The figure below shows more than order of magnitude variations in 1/f noise across the wafer:

Noise spectral power plots of 10 devices taken from
10 different locations across the wafer (see inset).

Any channel doping, such as Vth adjust, significantly increases 1/f and RTS noise:

Box plots of source follower noise power spectrum plots.
Red (Dark) boxes are doped devices.
Green (Light) boxes are undoped “native” transistors.

Few Vth adjust splits were measured:


It's not clear why S4 and S7 are not shown, but S1-S3 clearly show noise improvement:


The total read noise histogram clearly demonstrates the advantage of lightly doped source follower:


RTS Statistics shows the same:

6 comments:

  1. Question:
    The source-follower & selection transistors have different threshold voltages in this work. Normal the SF transistor and selection transistor are located very very close. How this Vth splitting is possible???

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  2. Vth adjust implants are quite low energy. Normally it's not a problem to separate them between select and source follower. Worst case, one might need a higher grade mask for Vth adjust implants.

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  3. Vladimir, what are the typical Vth values for NMOS & PMOS without Vth implant in a 0.18um CMOS process? Thanks in advance!

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  4. Depends on other implants in pixel. Typically it's in the range of 0-0.5V.

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  5. If you take a standard NMOS/PMOS, if the Vth implants are skipped, what will be the effective Vth please?

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  6. There is no "standard" here. Every fab, every process has its own Vth. There are different types of pmos/nmos also: core, I/O, natives, high-voltage, etc.

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