Sony and Stanford University files a patent application US20140231620 "Image sensor and imaging method with single shot compressed sensing" by Yusuke Oike and Abbas El Gamal aimed to save the image sensor power: "Low power consumption is a primary concern in many CMOS image sensor applications. As the resolution of these sensors has increased while maintaining or increasing their frame rate, the analog to digital conversion (A/D) associated with the sensors has become a dominant component of power consumption. Typical image compression techniques reduce the readout rate (and hence the I/O power consumption), but cannot reduce the power consumption associated with the A/D conversions."
So, the application proposes to modify the image sensor readout architecture so that compressed sensing techniques can be applied to save power. The idea is to divide the pixel array into small blocks 12 and add a MUX at the ADC input combined with an ADC activation generator "generating a random activation code that determines which of the plurality of A/D converters is activated; and obtaining a digital read-out of the analog signals from the activated A/D converters."
The readout timing is modified, so that for each pixel block 12, first the reset level is digitized and then the signal level goes through oversampled ADC, such as 1st order sigma-delta modulator:
Then the MUX select control PMX and ADC activation code ACT work in concert to distribute the signal across a number of ADCs, whereas the reset and signal level from the each pixel are processed by the same ADC:
"According to compressed sensing a compressible signal can be recovered from a small number of random measurements by sparsity promoting non-linear recovery algorithms. Therein, the number of A/D conversions represented by M can be sufficiently less than the number of pixels in a unit of pixel block represented by N, to recover the original image. When M number of A/D converters are simultaneously dedicated to N pixels, the image sensor outputs M digital codes for the N pixels so that the compression ratio M/N can be sufficiently less than 1.
The power consumption and bandwidth of both the A/D conversion and input-output transmission can be suppressed by a factor of M/N in comparison to a normal operation wherein N, A/D conversions are required to obtain an image of N pixels. For example, 16 A/D converters dedicated for a unit of pixel block of 256 pixels achieves a compression ratio of 1/16. Note that the compression ratio can easily be varied by changing the number of A/D converters dedicated for a unit of pixel block at the multiplexers. Further, this feature also enhances the frame rate for a given power consumption level, as frames are outputted at the rate of N/M"