Friday, January 29, 2016

EETimes on Stacking and FD-SOI in Image Sensors

EETimes publishes its analysis of stacking and FD-SOI trends in image sensors, helped by Yole Developpement. Few quotes:

"Yole estimated that in 2015, 27% of CIS revenues were generated from stacked chips, which the firm described as “roughly the market share of Sony.”

It is
[Pierre Cambou's, activity leader, Imaging & Sensors at Yole Développement] opinion that “up to now, only Sony is mastering the [chip stacking] technique.” Although Samsung and Omnivision publicized stacked chip releases, they have not been able to scale up, Cambou observed.

One Japanese industry source, who spoke on the condition of anonymity, told EE Times that he suspects Sony is likely well advanced in its FD-SOI project for CMOS image sensors.

Yole’s Cambou believes that FD-SOI could open a host of new possibilities for next-generation CIS. The challenge of FDSOI is the added cost (per mm2) that puts even more strain on the yield issue, said Cambou. At the same time, it is “probably a good opportunity for Sony to deepen the gap with its competitors.


Two Yole's slides from the article:

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