Monday, August 10, 2009

Aptina and Advasense Jointly Develop 1.1um Pixel?

Catching up with old news, 3 weeks ago Digitimes reported that Aptina and Advasense have set up a joint development project on 1.1um pixel. The article was originally published by Digitimes in Chinese on July 17. For those not having Digitimes subscription, it is also reposted in forums. The full translation of the article is below:

July 17, 2009- Zonghan Wu-- Digitimes Taiwan.

"The largest two CIS companies are competing on next-generation technology. Following the TSMC and OmniVision in 2008 to develop the back illumination BSI (Backside Illumination) technology, the source from market said Aptina dismissed the prejudice with its competitor, Advasense, an Israeli IC design company, to jointly develop next-generation 1.1um pixel CIS. They have signed a contract for at least 2 years to co-develop this technology. However, we are not sure which foundries the Advasense will choose in future, TSMC or Aptina.

OmniVison in 2008 with the Taiwan Semiconductor Manufacturing co-developed BSI process. In order to get more orders from customers, TSMC has not only put this process into a standard foundry business, and also transfer this technology to VIS.

Currently, OmniVision has been used 0.11-micron TSMC process to volume produce 2M, 5M, 8M sensors, most pixel pitch are 1.4um or 1.75um. In addition, TSMC is developing 1.1um-pixel BSI process. They will be mass-produced at TSMC's 12-inch fab.

In order to catch up with OmniVision, the source from market said Aptina and Adavasense have signed a 2 years contract to jointly develop 1.1um pixel pitch, 8M pixels CIS. In stage 1 they will use 90 nm process. In stage 2, 65nm and 45nm process will be used. In stage 2, it is possible to use Micron's 12'' fab to do some experiments.

It is said this time Aptina chose Adavasense as their partner, the main reason is most other CIS companies scales pixel size to get lower price. However, Advansense not only use this process method but also use their talented chip architecture to achieve the same goal.

It is interesting to note Advasense is originally expected to mass produce their sensors at TSMC at 2009Q4. If they co-develop 1.1um pixel sensor with Aptina, will they produce their CIS at TSMC any longer? Or they will choose Aptina's fab? Let's see what will happen."

Another Digitimes article from July 21 on the same matter says that Advasense is in talks with several foundries, including Aptina, for future cooperation for the development of CMOS image sensor (CIS) technology. Advasense aims to reduce CIS size via not only the manufacturing process but also the design structure, and it is likely to develop 8-megapixel CIS products or above with a 1.1-micron pixel pitch on 90nm process initially, followed by 65nm and 45nm processes, according to Digitimes sources.


  1. I heard that OV's 1.1um sensors were fabbed on 12-inch wafers. Doesn't Aptina fab need 12-inch capability to be competitive?

  2. Will 1.1um really take flight in the next 2-3 years? Practically speaking? Or is this all just a case of sabre-rattling?

  3. Many people, whole the industry is working for 1.1um to happen in 2 years. If not 1.1um pixels, I doubt it makes sense to develop consumer-grade BSI now.

    As for 12-inch vs 8-inch, 8-inch equipment is limited to 90nm process. Anybody going beyond 90nm has to switch to 12-inch. This is true for Omnivision, Aptina and others.

  4. Looks like TSMC is planning to go directly to 12" 65nm Cu for 1.1um. They already have some kind of working preliminary silicon


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