Wednesday, March 18, 2015

Sony Expands its Ziptronix Licensing Agreement to Multi-Million Stacked Chip Interconnects

Marketwired: Ziptronix announces a patent licensing agreement with Sony for application in advanced image sensors. The agreement is a continuation of the previous ZiBond agreement extended to Ziptronix's new DBI hybrid bonding patents for high volume applications.

"This license agreement with Sony is an exciting milestone for Ziptronix because it removes any doubt that our patented DBI hybrid bonding technology is both manufacturable and beneficial for high volume applications," noted Dan Donabedian, CEO and president of Ziptronix. "We believe it demonstrates that our patented hybrid bonding technology is both enabling and cost effective as compared to stacking with TSVs. Sony licensed Ziptronix's ZiBond direct bonding patents in 2011, which we also believe grew their image sensor market share from a few percent to the largest market share in the industry. We expect this new license for Ziptronix's DBI hybrid bonding patents will further contribute to Sony's growth within the industry. Any company wishing to compete in this space will need Ziptronix's DBI hybrid bonding patents."

DBI Fact Sheet lists the technology's features:

  • Interconnect pitch ≤10┬Ám
  • Accommodates 1.5M connections/cm2
  • No adhesives, solders, pressure, underfill or wire bonding required to bond and connect layers of active devices
  • Uses standard fab tools and processes
  • Highest reliability of all 3D processes because of hermetic sealing
  • Accommodates face-to-face architectures (top die/wafer upside down)
  • Accommodates face-to-back architectures (use of through-die vias/buried contacts)

Ziptronix DBI page says:

"DBI can achieve over 100,000,000 electrical connections per square centimeter; a significant increase over the ~ 100,000 connections per square centimeter density achieved with through-die vias used in other 3D interconnect approaches."

A Youtube video shows how it works:


  1. In the DBI fact sheet they say "interconnect pitch = 10um". In the webpage of Ziptronics it is stated that "DBI can achieve over 100,000,000 electrical connections per square centimeter" meaning a pitch of 1um. Which is the correct number?

    In any case, the real stacking technology is finaly here: enjoy the show :)

  2. Ziptronix has demonstrated 1.6um pitch. The limit to the technology is driven by the capability to simply align and place the wafers together and not by DBI technology itself. The interconnect are defined by lithography. It is truly an exciting and versatile technology enabling the explosive growth coming with the IoT.

    1. That sounds like a marketing quote. While I don't question its accuracy, throwing in "IoT" (the bandwagon du jour) seems gratuitous.

    2. So someone who invents a device to more accurately align wafers can enjoy part of this technologies success without impinging existing patents related to it?

  3. Does anyone can provide the patent no of DBI technology please?

  4. I wonder how they distribute the force equally over the wafer surface while only a small circle part of the upper wafer is attached to the pressure source. Maybe the inner part of the wafer has better contact than the outter part of it?


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