Friday, November 15, 2013

Last Seats at "ADCs for Imagers" Forum

Albert Theuwissen says there are just few last seats remain at the two December sessions of Imaging Forum "ADC for Image Sensors". Those who want to register, please hurry up! The invited lecturer is Marcel Pelgrom, known to every analog designer in the world by his classical works on device mismatch.


  1. Dear Vladomir, thanks for posting.
    BTW, it was announced this week that prof. Pelgrom will receive the title of "ere-professor" (professor "honoris causa") from the University of Leuven, Belgium. So for the forum, we got a "big fish" on the hook !

  2. I've been wondering for years why CCD sensors can have commercially available 16Bit ADC's and why CMOS sensors have seemingly never used an 16bit ADC. ?

    It seems all APS-C and 35mm FF CMOS sensors are limited to 14bit.

    Is there a reason apart from say cost as to why 16bit ADC are not being used?

    1. A true 16b ADC has quantization noise of LSB/sqrt(12) and, thus, supports pixel with a linear DR of over 107dB. While such pixels might be available somewhere, I'm not aware of any commercial sensor with linear pixels like these. It terms of price, 16b ADC is obviously larger and more power hungry than commonly used 10-12b ones, not to talk about wider data data paths and I/Os. Why pay this price if nobody sees it in picture?

    2. Thanks Vlad,

      I had been unable to find any posts or technical information on the subject. I had often wondered if their was some CIS limitation I was unaware of that was preventing it from being achievable in a commercial sense, in comparison to the widely available MF CCDs.

      Thank you for the informative answer, Love reading your blog, keep up the great work.

    3. I read in the question that there are CCD cameras with a 16bit ADC.
      Is it right?
      If so, what is the reason?

    4. May be the ADC LSB should be smaller than the noise to avoid FPN?

    5. How does the small LSB help to avoid FPN?

    6. @ there are CCD cameras with a 16bit ADC.

      It depends on pixel size. Scientific grade CCDs with large pixels might have full well of many millions of electrons. Then the 16b ADC might be needed to preserve their full DR.

    7. Vlad, vertical fpn should be 7-8 times lower than temporal. See works from Seo, shizouka university. 17 and 19 bit column parallel adcs

    8. I still do not get you. If the ADC resolution is low, the temporal noise is dominated by its quantization noise. This does not prevent the FPN to go well below the LSB, such as 0.1 LSB, or 0.01 LSB, or whatever, well below the temporal quantization noise.

      Am I missing something?

    9. FPN biases the values so if you average temporally to improve SNR, then the FPN can emerge from the background. To eliminate this problem, you need to be able to digitize the FPN in a dark field and in the live image data with enough amplitude resolution to subtract it out.

    10. I guess you assume that FPN exists in analog domain, and subtract it in digital. It's not necessarily so. Well designed analog CDS can have quite low FPN.

      If analog indeed has sub-LSB FPN and one wants to compensate it in a digital domain, dithering is much easier and cheaper option. You can get the sub-LSB FPN after averaging, and subtract it digitally, or feed it back to the analog through a low resolution DAC with a full-scale of order of LSB or so.

      In most practical cases the quantization noise is already dithered by the device noises, kTC sampler noise and such. And some ADC technologies have quantization noise in temporal domain and need less, if any, dithering, such as sigma-delta.


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