“Even the most modern image sensors are limited in the dynamic range which they can capture,” said Alfred Zee, President & CEO of Pinnacle Imaging Systems. “We believe that cameras should be able to provide the same contrast range that we naturally see with our own eyes, so we based our technology on the human vision model. It’s this unique approach that allows our Ultra HDR technology to deliver such color-accurate, high contrast video quality.”
Pinnacle Ultra HDR technology addresses many of the complexities involved in HDR video capture including:
- Automatic Ghost Removal & Halo Reduction – Compensates for movement between HDR exposures, from minimal camera motion to moving objects between frames
- Adaptive Local Tone Mapping – Automatically optimizes the tone mapping parameters based on the shadow and highlight areas of each individual video frame
- Automatic White Balance Controls – Automatically calculates proper white balance settings for any scene or lighting condition
- Automatic Exposure Controls – Real time calculation and adjustment of the sensor’s exposure settings based on an automatic or manually selected region of interest to allow accurate exposure throughout a scene
- Shadow Exposure Bias Option – Ability to bias tone mapping with an additional Shadow Tracking option during the Auto Exposure mode for optimal shadow detail and data preservation, a key requirement for surveillance applications
FPGA-based Ultra HDR Dev. Platform resource requirements:
Existing FPGA Based Platform (full video path)
- 40k slices, 308 DSP blocks
- 600k byte internal RAM (155 36k bit BRAM, 32 18k bit BRAM)
- 28G bit external DDR3 BW, memory for frame buffers
- Currently running at 148.5MHz clock rate
- Can be ported to low cost Altera (Cyclone) or Xilinx (Artix)
- Single input data stream, one frame/exposure at a time.
- IP size is 480k gates coupled with 59k bytes of RAM.
- Requires 19G bit/s bandwidth on an external DDR port for frame buffering.
- IP size is 327k gates coupled with 300k bytes of RAM.
- Requires 9.5G bit/s bandwidth on an external DDR port for frame buffering.