"In this work, a highly-sensitive global-shutter CMOS image sensor with on-chip memory that can capture up to 16 frames at speeds higher than 200kfps is presented. The sensor fabricated and tested is a 100 x 100 pixel sensor, and was designed to be expandable to a 1000 x 1000 pixel sensor using the same building blocks and similar architecture.
The heart of the sensor is the pixel. The pixel consists of 11 transistors (11T) and 2 MOSFET capacitors. A 6T front-end is followed by a Correlated Double Sampling (CDS) circuitry that includes 2 capacitors and a reset switch. The 4T back-end circuitry consists of a source follower, in-pixel current source and 2 switches. The pixel design is unique because of the following. In a relatively small area, 15.1um x 15.1um, it performs CDS that limits the noise stored in the pixel memories to less than 0.33mV rms and allows the stored value to be read in a single readout. Moreover, it has in-pixel current source, which can be turned OFF when not in use, to remove the dependency of its output voltage to its location in the sensor. Furthermore, the in-pixel capacitors are MOSFET capacitors and do not utilize any space in the upper metal layers, therefore, they can be used exclusively for routing. And at the same time it has a fill
factor greater than 40%, which important for high sensitivity.
Each pixel is connected to a dedicated memory, which is outside the pixel array and consists of 16 MOSFET capacitors and their access switches (1T1C design). Fifty pixels share a line for their connection to their dedicated memory blocks, and, therefore, the transfer of all the stored pixel values to the on-chip memories happens within 50 clock cycles. This allows capturing consecutive frames at speeds higher than 200 kfps. The total rms noise stored in the memories is 0.4 mV."
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