Saturday, July 11, 2015

Cista First 5 Patent Applications Published

Remember Cista Systems, a startup founded by ex-Omnivision engineers? Now it has its first five patent applications published and revealing its innovations:

US20150171130 application "Integrated circuit having flexible reference" by Dennis Tunglin Lee, Guangbin Zhang proposes a flexible way to control reference voltages in image sensor. The application states "To reduce the layout area, designers often choose the best-guess range of rough-step references. However, the consequence is that the capability of design characterization is limited, and the accuracy of characterization is greatly compromised... As electronic devices become smaller and more light-weighted, it is desirable to provide a wide range of fine-step reference source with a small physical layout area." The company proposes to combine a voltage reference, such as bandgap one, with a voltage converting circuit, such as R-2R ladder DAC:

US20150171749 application "Voltage regulator with multiple output ranges" by Li Guo, Guangbin Zhang addresses an issue that "Conventional linear voltage regulators... can provide only a single voltage output range, i.e., either positive or negative. Specifically, the positive voltage regulator can output only a positive voltage, and the negative voltage regulator can output only a negative voltage. As a result, manufacturers in the electronic industry have to prepare many different kinds of voltage regulators, in order to meet the needs in different applications." The proposed regulator gets the a positive voltage from supply and a negative voltage from a negative charge pump 13, and can change its output polarity, depending on the need:

US20150189197 application "Compact row decoder with multiple voltage support" by Li Guo, Guangbin Zhang defines the problem: "As the resolution of the CMOS in sensor is continuously improved, the number of the pixel rows included in the CMOS image sensor increases accordingly. As a result, more and more row-level decoders are deployed in the CMOS image sensor to drive the pixel rows. These two-level decoders consume a significant portion of the layout area and increase the overall cost of the image sensor." So, the company proposes a more compact decoder:

US20150171841 application "Method and system for generating a ramping signal" by Dennis Tunglin Lee, Guangbin Zhang solves a number of challenges "The ramp signal generator generates a ramping signal as a global reference signal for column read circuits to record the converted electrical signal. In operation, the quality of the ramping signal can significantly affect the quality of the output of the image sensor. For example, a ramping signal with poor linearity can cause a gain non-linearity of the column read circuits. In addition, a ramping signal with a large glitch power can have a lost-bit effect. Moreover, a ramp signal generator with low power consumption and a small physical area is often desired." So, the company presents its approach to the ramp generators based on the currents, then converted to the voltages:

US20150172580 application "Column comparator system and method for comparing a ramping signal and an input signal" by Guangbin Zhang defines the problem: " because a large number of comparators are used, a significant portion of the total power consumption and the vertical fixed-pattern noise (VFPN) of an image sensor circuit may be attributed to the comparators. Additionally, analog type comparators may have a slower conversion speed, due to the low operation speed of analog transistors." The solution is presented below in flowchart and the actual schematic forms. Basically, the idea is to control the gain of the comparator, so that its delay mismatches that contribute to the column FPN can be made lower, when possible:

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