Monday, November 25, 2013

OpenVX and Power-Efficient Image Processing

Khronos Group VP Erik Noreke presents "Vision, Camera and Sensor Processing" at SIGGRAPH Asia 2013:

1 comment:

  1. The nub of the issue here is how to share data at high bandwidth between elements of a SW configurable chain of HW accelerators

    Certainly the L1-L2 cache paradigm used in most application processors will not support this kind of processing pipeline at rates approaching 1Gpixel/sec


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