Tuesday, November 01, 2016

TPSCo Develops World's Smallest GS Pixels for e2v

GlobeNewsWire: TowerJazz and e2v announce that e2v’s standard and custom CMOS image sensor solutions are now available with a newly developed generation of global shutter pixels. This advanced solution has been developed by TowerJazz at TowerJazz Panasonic Semiconductor Co. (TPSCo). TPSCo’s ability to produce premium quality image sensors enabled TowerJazz to develop the world’s smallest global shutter pixel, on a 110nm technology node with extremely high shutter efficiency. It will also serve next generation industrial and 3D gesture recognition market segments.

The new technology platform from TowerJazz will be transferred from Arai, Japan to Migdal Haemek, Israel to support large sensors and stitching, providing dual sourcing to its growing customer base.

François Thouret, President of Professional Imaging at e2v, said, “Our successful relationship with TowerJazz extends over 10 years. We are very proud to be the leading customer partnering with them and TPSCo to bring this innovative imaging solution to the market. In a fast changing and demanding industry, the availability of this groundbreaking technology is a key milestone to ensure our standard and custom solutions fulfill the current and future needs of our customers.

Dr. Avi Strum, TowerJazz Senior VP and General Manager of CMOS Image Sensor Business Unit, said, “We are very pleased to have collaborated with e2v to produce the first sensor in the world with pixels as small as 2.8um. e2v has been a strong and dedicated partner to TowerJazz. Its exceptional capabilities in CMOS sensor design technology help deliver the best results from our leading process technology, allowing us both to gain market share in this innovative and competitive market.


  1. Same techno than the 3.6um from Tower, used with Intel RealSens?

    Which techno used here to store value within the pixel?
    Is Sony better with their 3.45um global shuter ?

  2. What kind of dark current the pixel has, for 60 degC?
    I can't find it on their current documentation.

  3. My guess is Floating diffusion as storage node + digital CDS With embedded ram.

  4. If it's MIM cap storage, what is the size of a single pixel storage? MIM is not much efficient? And so you store charges or voltage?

  5. Isn't MIM caps. With MIM caps isn't possible to have a storage element per pixel for a 2.8um pixel pitch.


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