In the beginning of 2018, Superpix reported that the "new 80,000 image sensor chip SP0821, which was launched less than two months ago, set off a wave of enthusiasm in the market and ushered in a good start in 2018."
Sunday, August 05, 2018
$0.068 for a QVGA Sensor with ISP
I missed this news at the time. On Dec 1, 2017, Superpix announced "the most competitive 80,000 image sensor chip SP0821" that costs just 6.8 cents. The sensor is based on 2.5um pixels and includes ISP with AE, AWB, noise reduction, and other usual ISP functions:
In the beginning of 2018, Superpix reported that the "new 80,000 image sensor chip SP0821, which was launched less than two months ago, set off a wave of enthusiasm in the market and ushered in a good start in 2018."
In the beginning of 2018, Superpix reported that the "new 80,000 image sensor chip SP0821, which was launched less than two months ago, set off a wave of enthusiasm in the market and ushered in a good start in 2018."
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http://www.superpix.com.cn/cn/xiazai/SP0821.pdf - A flyer
ReplyDeleteWell, the resolution is 320x240. At 2.5µm pixel size we are talking about a 800µm x 600µm field. I wonder how large the entire chip is, but we are probably talking about less than 2mm² of silicon...
Actually, the link to the flyer is in the post.
DeleteAs for the area, one needs to add CDS and ADC - usually more than 500 sq.um per column, depending on the process. A rudimentary ISP is at least 100 Kgates, or, if they indeed implemented the scene recognition, 200 Kgates or more. Add a digital controller, row decoder, PLL, TSV I/O, seal ring - it would be nice if they managed to squeeze all this in 2 sq.mm
If they are indeed 2 sq.mm, there are about 15,000 dies per 8-inch wafer. Assuming $600 CIS wafer cost, including microlens and CFA, they are already at 4 cents per die. Then, there is a testing and TSV packaging cost. Hope their yield is close to 100%.
Do they make any profit? Recover R&D and tapeout mask expenses? Hope they did just 1 tapeout before releasing it into mass production.
Vladimir, where can you find CIS wafer with ML/CFA at 600$ please? Is it a 2-inch wafer?
DeleteExcellent question. There are rumors that some fabs do it for very high volume strategic customers. To get this price, one has to commit on huge volumes comparable to the whole fab output.
DeleteOn the other hand, if you get a more reasonable price of $1,500 per wafer, how do you reach 3.8 cents per packaged and tested chip?
Suppose that the mask set/tooling costs 300K$, for 1-2 cents gros profit, you need to sell 30M to cover this basic expense, not talking about design costs.
DeleteFor low end mass production, definitely less than $600 if you want to stay alive in this business.
ReplyDeleteWell, I wonder how CMOSIS did this image sensor then:
ReplyDeletehttps://ams.com/naneye
Assuming they are stacking two chips, they will still end up with less than 2mm² usable die space.
NanEye has no integrated ISP. It's probably not needed for their target market.
Deleteyes, $600 without TSV is too expensive. such low price you can only get in China.
ReplyDeletethe typical gross margin is around 10% to 15%, but company is still alive.
weird? you can see BOE, another huge loss company but can commit the G10.5 line...
don't forget, China is still a communism country. everything is possible, if the government wants
Because this die is so small, it can share the wafer lots (as filler) with any other products (having big die and high volume). Therefore, the price can be very low (if not free on wafer cost).
ReplyDelete