- Resolution: 3888 x 3072 pixels
- Sensitive area: 290.8 mm x 229.8 mm
- Pixel size: 74.8 um
- Saturation charge: 1.4 Me- in high saturation mode, 0.36 Me- in high sensitivity mode
- Dynamic range: 70dB typ. in high saturation mode, 66dB typ. in high sensitivity mode
- Dark current: 8000 e-/s (typical at 40C)
- ADC resolution: 14 bits
- Speed: 26 fps at full resolution
- Power consumption: 45 W max (active)
- Power down current: <150 mA
The sensor is intended for X-Ray sensing applications. Packaging of such a huge and power hungry sensor is also challenging: the package weights 5.5kg and includes two fans:
The diagonal of the sensor is 370 mm, which does not fit to a 300 mm wafer, so I guess this is not a monolithic CMOS imager or am I wrong ?
ReplyDeleteAlbert, would you mind clarifying which counter is which in the "ISSCC Review, Part 5" thread?
ReplyDeleteIt it tiled from four of these - http://dexela.com/documents/1512_data_sheet.pdf - sensors.
ReplyDeleteTrue, Dexela too mentioned it's tiled:
ReplyDeletehttp://image-sensors-world.blogspot.com/2009/01/largest-commercial-cmos-sensor-to.html
to CDM : the lower bit counters have the common counter for 248 columns, the upper bit counters have an individual counter in every column. Hope this answers your question.
ReplyDeleteThe least-significant bit (LSB) is the one that flips at every clock cycle and counts the smallest time increment. Is this bit included in the lower bit counters or in the upper bit counters?
ReplyDeleteI am basically wondering whether the fastest counting rates are in the pitch-matched up-down counters or in the shared counters.
to CDM : right, LSB are the ones that flip the most.
ReplyDelete