Wednesday, November 22, 2017

Soitec on SOI-based Imagers

EETimes' Junko Yoshida publishes an interview with Soitec CEO Paul Boudre. The company now offers SOI wafers for imaging, in addition to its more traditional applications:

"Soitec sees a growing opportunity for its Imager-SOI. Without naming any customers, Soitec listed a number of advantages of Imager-SOI. These include the ability to lower NIR illuminator power consumption, better performance through increased signal to noise ratio, and keeping cost down — because of its “lower die size” compared to bulk for the same resolution."

One should note that the first reports about Soitec plans to make on imaging-optimized wafers appeared in 2013.

EEJournal publishes an article on Soitec wafer types and their differences:


  1. Interesting... look like this SOI substrate is applied today onto one ST FSI image sensor... can this be applied and maintain the same benefits of thick epi + high photodiode quality under one BSI flow?

  2. I think that the SOI can reflect the NIR back to PPD for a second absorption and also a bias voltage can be applied to push the electrons upward to the PPD ...

    -yang ni


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