IEEE Journal of Selected Topics in Quantum Electronics publishes a paper "Engineering Breakdown Probability Profile for PDP and DCR Optimization in a SPAD Fabricated in a Standard 55nm BCD Process" by Francesco Gramuglia, Pouyan Keshavarzian, Ekin Kizilkan, Claudio Bruschini, Shyue Seng Tan, Michelle Tng, Elgin Quek, Myung-Jae Lee, and Edoardo Charbon from EPFL (Switzerland), Globalfoundries (Singapore), KIST (Korea).
"In this paper, we present SPADs based on DPW/BNW junctions in a standard Bipolar-CMOS-DMOS (BCD) technology with results comparable to the state-of-the-art in terms of sensitivity and noise in a deep sub-micron process. Technology CAD (TCAD) simulations demonstrate the improved PDP with the simple addition of a single existing implant, which allows for an engineered performance without modifications to the process. The result is an 8.8 μm diameter SPAD exhibiting ~2.6 cps/μm^2 DCR at 20°C with 7 V excess bias. The improved structure obtains a PDP of 62 % and ~4.2 % at 530 nm and 940 nm, respectively. Afterpulsing probability is ~0.97 % and the timing response is 52 ps FWHM when measured with integrated passive quench/active recharge circuitry at 3V excess bias."
1.2cps/m2 would be amazing.... But I think it is 1.2cps/um2. Nice to have another foundry available to our colleagues for this work.
ReplyDeleteYou are right, Eric. I just copied it from IEEE site. The html has this number, while pdf file talks abou um2, rather than m2.
DeleteUpon a closer inspection, the pdf abstract states 2.6cps/um2, while the html one states 1.2cps/m2. Not sure which number is correct, even disregarding the units.
Hi both,
ReplyDeleteWe are working with the editors to fix the HTML typo. Please refer to the pdf, which has the correct value. Apologies.
Edoardo.
Thank you, Edoardo. Fixed the text now.
Delete