Wednesday, October 19, 2011

Canon Full-frame 35mm Sensor News

The newly announced Canon EOS-1DX camera features 18.1MP full-frame 35mm sensor. Canon Europe explains technologies it's implemented in the new device, albeit in hard to understand marketing talk:
  • New photodiode construction has resulted in an improved photoelectric conversion rate that gives increased light sensitivity.
  • Improved transistors inside the pixels are said to make SNR higher
  • The first time that gapless microlenses have been employed on a Canon full-frame sensor.
  • 14fps speed is achieved by a 16-channel analog output with two-vertical-pixel simultaneous readout. The 16 outputs are muxed in 4 ADCs siting on a separate image processor chip Digic 5+. It is around 1.4 times faster than the previous generation EOS-1D Mark IV and said to be a first for a 35mm full-frame digital sensor. At ISO 32,000 or higher the frame rate is reduced to 10fps.


  1. So no on-chip ADC??

  2. In DP Review talks about All-I compression as the highest quality (least compressed) format in the IDX. Any details on that yet?

  3. ah who cares.. give me infos how much better DR is and how many stops better is noise?

  4. If you don't care then don't post. That's not so tough is it?

    Many of us like a little bit behind the stuff. And since the camera was announced 2 days ago and is said to be coming in 6 months, there can't be that much so far...

  5. May want to change that frame rate back to 12 before someone believes 14fps and starts whining.

  6. it's 12fps raw and 14fps jpg.

  7. Hmm, correct me if i am wrong!
    I thought the 5DMKII was the first with gapless sensors back in it's time?

  8. @layth

    As far as the 5D Mk2:

    ''the gap between microlenses has been reduced compared to the original EOS 5D''

    IE not gapless

    Seems Canon's FF claim still true ;-)

  9. No, the 5D2 doesn't have gapless microlenses. Perhaps you are thinking of the 50D, which uses a smaller sensor.

  10. Nope, microlenses on 5DMKII aren't gapless. This should effect a non zero improvement on sensitivity over other full frames.

  11. What about the dynamic range of the sensor? Any figures given?

  12. I'm curious about dynamic range too.
    But to be precise, dynamic range will not be a matter of the sensor anymore as its output is analogue. As written above, the ADC is located on another chip.
    Think on base of latest history it should be at least 14-bit, .. but on the other hand, would we really care for more ??

  13. "dynamic range will not be a matter of the sensor anymore as its output is analogue(sic)"

    This is wrong. As long as analog DR is less precise than the quantization (as is the case, for instance, with the 50D), it is determined by the sensor; then that in turn is quantized by the AtoD process.

    Or to put it another way, if the analog sensor only returns 0v and 1v, it doesn't help to digitize that to 16 bits, you're still only going to get 0x0000 and 0xffff, or two levels.

    Doesn't do you much good to have more bits resolution than the sensor provides. Ultimate DR is usually limited by various swamping noise effects in the sensor (unless you're stacking and so can take advantage of statistical techniques.)

  14. Sony uses on-chip ADC. Are there any chances Canon can get equivalent DR with analog output ?

    (I doubt it, as the analog signal is subject to all kinds of parasites... but I'm no specialist)

  15. Yes, Canon can be on-par with Sony with external ADC. There are few advantages and drawbacks of having ADC on a separate chip.


    - lower power dissipation on the sensor chip - translates to lower dark current, primarily in video mode.

    - ADC design is free from image sensor process limitations and can be designed in most advanced process available - meaning it can be lower noise, faster, higher resolution and smaller in area, that is, cheaper.

    - Having less digital logic on sensor chip can, in theory, reduce sensor structured noise, like row and column-wise noise.


    - The board design is much more critical, as it requires transferring of many low noise analog signals

    - The 16 outputs probably have little differences between them, need calibration.

    All in all, one can not say that Canon's approach is better or worse than Sony's. It's the implementation details that matter.

  16. I discuss the all i compression scheme & the frame rate in my hands on preview:

  17. Thank you for your description of advantages/drawbacks.

    I'm curious to see if Canon achieved to match Sony's low-iso read noise (Sony's big advantage if I understood things right).
    PS : I saw somewhere the idea of reading separately the higher part and the lower part of the signal (and amplifying the lower one, like combining a 100iso and a 1600iso image), but if it hasn't been done, there must be many practical problems...?

  18. @ "I'm curious to see if Canon achieved to match Sony's low-iso read noise (Sony's big advantage if I understood things right)."

    There is not enough information to answer on this, sorry.

    @ "I saw somewhere the idea of reading separately the higher part and the lower part of the signal"

    Such a sensor is made and sold by Fairchild Imaging under sCMOS brand (Scientific CMOS). It's very expensive, I've heard, probably out of reach for consumer market. However, Andor, OCO and Fairchild Imaging sell industrial cameras with this sensor. See here:

  19. just calculated pixel size 6,9um...
    Seems some around 7 um is optimal for noise and other conditions.

  20. Thank you for the scmos info.
    I just saw that ARRI Alexa also uses this type of technology, maybe from the same source ?

  21. Indeed, ARRI sensor is similar to sCMOS, but it does not have on-chip ADC. Interesting info anyway, thanks!

  22. CMOSIS seems to have demonstrated also a dual gain (transfergate) approach:

    "A 89dB Dynamic Range CMOS Image Sensor with Dual Transfer Gatel Pixel", Xinyang Wang, Bram Wolfs, Guy Meyants, Jan Bogaerts, 2011 International Image Sensor Workshop, 08-11 Jun 2011, 23 Jun 2011, Hokkaido, Japan

    "Duale Transfer-Gatter (DTG) in CMOS Pixels steigern den dynamischen Bereich", X. Wang, B. Wolfs, G Meynants and Jan Bogaerts, Photonik, 5 (2011), page 42- 44, 01 Oct 2011

    Who designed the ARRI sensor?

  23. about sCMOS price

    Why would the sCMOS technology have to lead to prices out of reach for the consumer market? Probably the asked price for the current product is an opportunity price, based on pricing of competing and very expensive CCD's.

  24. @ "CMOSIS seems to have demonstrated also a dual gain (transfergate) approach"

    Yes, you are right. CMOSIS and few other companies are working on dual gain concept too.

    @ sCMOS pricing:

    This is a good question to ask Fairchild Imaging.

  25. The ARRI sensor was designed by Cypress, now On Semi:

  26. Art is more important


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