Friday, May 25, 2012

Failure Mechanism in CCD

Truesense patent US8,184,186 talks about an interesting failure mechanism in CCDs:

"A voltage applied to the substrate is set to a first level when the photosensitive regions accumulate charge. When an electronic shutter operation is to be performed, the voltage is changed to a second level. An image sensor, such as an interline charge-coupled device (CCD) image sensor, can be permanently damaged when the image sensor is exposed to extremely bright light during an electronic shutter operation. The damage is caused by a parasitic bipolar transistor formed within the image sensor. FIG. 1 is a schematic of a parasitic bipolar transistor formed in a prior art interline CCD image sensor. An n-type vertical CCD channel can become an emitter of the transistor (Vccd), a grounded p-well under the vertical CCD the base, and an n-type substrate the collector of the transistor (Vsub)."

"At the center of a pixel array the p-well resistance (represented by R in FIG. 1) is very large because the ground contacts are at the edges of the pixel array. This large resistance allows the bright light to generate photocurrent at the base of the transistor faster than the resistor R can drain it away. A bright spot from the sun, for example, can raise the voltage of the base high enough to turn on the transistor and short the electronic shutter voltage to the vertical CCD channel. The high voltage on the vertical CCD channel will inject charge into the vertical CCD gate dielectric. The injected charge first causes increased dark current in the vertical CCD. With continued bright light exposure during multiple electronic shutter pulses, a sufficient amount of charge is injected into the gate dielectric to cause poor charge transfer and image lag."

Truesense's patent proposes to detect the excessive current and block the shutter operation if it exceeds a certain threshold level.

1 comment:

  1. Well, a simple serial resistor inside Vsub should be enough :)

    -yang ni


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