Wednesday, May 16, 2018

Framos Offers Sony SLVS-EC RX as FPGA IP

Framos SLVS-EC RX IP Core shortens design time with the latest generation of Sony image sensors. The SLVS-EC interface (Scalable Low-Voltage Signaling with Embedded Clock) has up to 8 lanes and 2.376 Gbps throughput per lane. When compared to Sony’s 2nd-generation CMOS image sensors with S-LVDS interfaces, the SLVS-EC interface doubles the overall output speed to 19 Gbps. SLVS-EC has more than three times higher bandwidth per lane.

Thanks to RP for the link!


  1. pity that this is not an open standard.

  2. Can anyone share technical references / patents for Sony's SLVS-EC drivers? I know key details would be proprietary and missing, but still, 2.4 Gbps over a kind-of long PCB track parasitics is quite remarkable...

  3. Can anyone share technical references for Sony's SLVS-EC?


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